@@ -754,9 +754,9 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
if (ret)
goto out;
- desc->completed_desc_num += complete_desc_num;
-
if (desc->cyclic) {
+ desc->completed_desc_num = complete_desc_num;
+
ret = regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS,
&st);
if (ret)
@@ -768,6 +768,8 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
goto out;
}
+ desc->completed_desc_num += complete_desc_num;
+
/*
* if all data blocks are transferred, remove and complete the request
*/
Xilinx DMA engine is capable of keeping track of the number of elapsed periods and this is an increasing 32-bit counter which is only reset when turning off the engine. No need to add this value to our local counter. Fixes: cd8c732ce1a5 ("dmaengine: xilinx: xdma: Support cyclic transfers") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- Hello, so far all my testing was performed by looping the playback output to the recording input and comparing the files using FFTs. Unfortunately, when the DMA engine suffers from the same issue on both sides, some issues may appear un-noticed, which is likely what happened here as the tooling did not report any issue while analyzing the output until I actually listened to real audio now that I have in my hands the relevant hardware/connectors to do so. --- drivers/dma/xilinx/xdma.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)