diff mbox series

[v4,4/6] dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access

Message ID 20231221153528.1588049-5-Frank.Li@nxp.com (mailing list archive)
State Accepted
Commit b51dd7c8aac292396d038d0a9fb9c1589addb515
Headers show
Series dmaengine: fsl-edma: integrate TCD64 support for 64bit physical address | expand

Commit Message

Frank Li Dec. 21, 2023, 3:35 p.m. UTC 
The TCD structure has undergone modifications, incorporating fields
extended to 64 bits. When TCD64 is enabled, the TCD type shifts to
'void *'. Use of the edma_write_tcdreg() macro to facilitate TCD register
access.

Add cpu_to_le32(0) to ensure little-endian compatibility with TCD
registers and avoid a build warning.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/dma/mcf-edma-main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c
index ab21455d9c3a4..dba6317838767 100644
--- a/drivers/dma/mcf-edma-main.c
+++ b/drivers/dma/mcf-edma-main.c
@@ -202,7 +202,7 @@  static int mcf_edma_probe(struct platform_device *pdev)
 		vchan_init(&mcf_chan->vchan, &mcf_edma->dma_dev);
 		mcf_chan->tcd = mcf_edma->membase + EDMA_TCD
 				+ i * sizeof(struct fsl_edma_hw_tcd);
-		iowrite32(0x0, &mcf_chan->tcd->csr);
+		edma_write_tcdreg(mcf_chan, cpu_to_le32(0), csr);
 	}
 
 	iowrite32(~0, regs->inth);