[1/1] dmaengine: mxs-dma: switch from dma_coherent to dma_pool

Commit Message

Frank Li Feb. 19, 2024, 3:57 p.m. UTC

From: Han Xu <[e-mail]>

Using dma_pool to manage dma descriptor memory.

Signed-off-by: Han Xu <[e-mail]>
Signed-off-by: Frank Li <[e-mail]>
---
 drivers/dma/mxs-dma.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

Comments

Fabio Estevam Feb. 19, 2024, 4:23 p.m. UTC | #1

On Mon, Feb 19, 2024 at 12:57 PM Frank Li <[e-mail]> wrote:
>
> From: Han Xu <[e-mail]>
>
> Using dma_pool to manage dma descriptor memory.

Please clearly describe the motivation for doing this.

Frank Li Feb. 20, 2024, 5:38 p.m. UTC | #2

On Mon, Feb 19, 2024 at 01:23:22PM -0300, Fabio Estevam wrote:
> On Mon, Feb 19, 2024 at 12:57 PM Frank Li <[e-mail]> wrote:
> >
> > From: Han Xu <[e-mail]>
> >
> > Using dma_pool to manage dma descriptor memory.
> 
> Please clearly describe the motivation for doing this.

This try to fix a cma_alloc failure. But it is not correct to use dma_pool.
let's work out a better method.

Frank

Vinod Koul Feb. 22, 2024, 1:47 p.m. UTC | #3

On 20-02-24, 12:38, Frank Li wrote:
> On Mon, Feb 19, 2024 at 01:23:22PM -0300, Fabio Estevam wrote:
> > On Mon, Feb 19, 2024 at 12:57 PM Frank Li <[e-mail]> wrote:
> > >
> > > From: Han Xu <[e-mail]>
> > >
> > > Using dma_pool to manage dma descriptor memory.
> > 
> > Please clearly describe the motivation for doing this.
> 
> This try to fix a cma_alloc failure. But it is not correct to use dma_pool.
> let's work out a better method.

Good one, but this should be in log :-)

> 
> Frank

Patch

diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index cfb9962417ef6..a60bf7a22492d 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -24,6 +24,7 @@ 
 #include <linux/of_dma.h>
 #include <linux/list.h>
 #include <linux/dma/mxs-dma.h>
+#include <linux/dmapool.h>
 
 #include <asm/irq.h>
 
@@ -104,6 +105,7 @@  struct mxs_dma_ccw {
 
 #define CCW_BLOCK_SIZE	(4 * PAGE_SIZE)
 #define NUM_CCW	(int)(CCW_BLOCK_SIZE / sizeof(struct mxs_dma_ccw))
+#define CCW_BLOCK_ALGIN	32
 
 struct mxs_dma_chan {
 	struct mxs_dma_engine		*mxs_dma;
@@ -117,6 +119,7 @@  struct mxs_dma_chan {
 	enum dma_status			status;
 	unsigned int			flags;
 	bool				reset;
+	struct dma_pool			*ccw_pool;
 #define MXS_DMA_SG_LOOP			(1 << 0)
 #define MXS_DMA_USE_SEMAPHORE		(1 << 1)
 };
@@ -398,9 +401,8 @@  static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
 	struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
 	int ret;
 
-	mxs_chan->ccw = dma_alloc_coherent(mxs_dma->dma_device.dev,
-					   CCW_BLOCK_SIZE,
-					   &mxs_chan->ccw_phys, GFP_KERNEL);
+	mxs_chan->ccw = dma_pool_zalloc(mxs_chan->ccw_pool, GFP_ATOMIC, &mxs_chan->ccw_phys);
+
 	if (!mxs_chan->ccw) {
 		ret = -ENOMEM;
 		goto err_alloc;
@@ -428,8 +430,7 @@  static int mxs_dma_alloc_chan_resources(struct dma_chan *chan)
 err_clk:
 	free_irq(mxs_chan->chan_irq, mxs_dma);
 err_irq:
-	dma_free_coherent(mxs_dma->dma_device.dev, CCW_BLOCK_SIZE,
-			mxs_chan->ccw, mxs_chan->ccw_phys);
+	dma_pool_free(mxs_chan->ccw_pool, mxs_chan->ccw, mxs_chan->ccw_phys);
 err_alloc:
 	return ret;
 }
@@ -443,8 +444,7 @@  static void mxs_dma_free_chan_resources(struct dma_chan *chan)
 
 	free_irq(mxs_chan->chan_irq, mxs_dma);
 
-	dma_free_coherent(mxs_dma->dma_device.dev, CCW_BLOCK_SIZE,
-			mxs_chan->ccw, mxs_chan->ccw_phys);
+	dma_pool_free(mxs_chan->ccw_pool, mxs_chan->ccw, mxs_chan->ccw_phys);
 
 	clk_disable_unprepare(mxs_dma->clk);
 }
@@ -745,6 +745,7 @@  static int mxs_dma_probe(struct platform_device *pdev)
 	struct device_node *np = pdev->dev.of_node;
 	const struct mxs_dma_type *dma_type;
 	struct mxs_dma_engine *mxs_dma;
+	struct dma_pool *ccw_pool;
 	int ret, i;
 
 	mxs_dma = devm_kzalloc(&pdev->dev, sizeof(*mxs_dma), GFP_KERNEL);
@@ -797,6 +798,15 @@  static int mxs_dma_probe(struct platform_device *pdev)
 	mxs_dma->pdev = pdev;
 	mxs_dma->dma_device.dev = &pdev->dev;
 
+	ccw_pool = dma_pool_create("ccw_pool", mxs_dma->dma_device.dev, CCW_BLOCK_SIZE,
+				   CCW_BLOCK_ALGIN, 0);
+
+	for (i = 0; i < MXS_DMA_CHANNELS; i++) {
+		struct mxs_dma_chan *mxs_chan = &mxs_dma->mxs_chans[i];
+
+		mxs_chan->ccw_pool = ccw_pool;
+	}
+
 	/* mxs_dma gets 65535 bytes maximum sg size */
 	dma_set_max_seg_size(mxs_dma->dma_device.dev, MAX_XFER_BYTES);