From patchwork Thu Mar 7 17:32:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 13586075 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2074.outbound.protection.outlook.com [40.107.21.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 414F3130E2B; Thu, 7 Mar 2024 17:33:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.74 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709832797; cv=fail; b=V88pOqex034/1z0rOiQRd9JDz6UYtHZ6BtBkQBz5+wvBmegQHezTTxHdhSrdm8Ym9FI2bAciKUABBU0ZBpdCM8lzzW68ibkCVfOx9mCHODXn308czes5nQlUE4nfIYeu75MQCfhw79z0SWmTFMqSNRnY21+/m1cOkTUyJzA8jIE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709832797; c=relaxed/simple; bh=pkEVvWOsGPC8GRmMAKNJcok9PfGzxBg+simpRDnERxE=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=hfEx87hcXVxVOBC4qag1qoMygduImIE2DVEBk4FdQuUxpk8I/qrA+8GLmuPN4HBlZcmEsjSeDF2aNRRHqwL20h5gl0mKiwftsqUKFntuNAU3zpQk/76KOryci4ntFQHfF6bPjYDZojvdLTIFUTgKB5CncV25IcjXi9PaCihHvh0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b=MSPUuapO; arc=fail smtp.client-ip=40.107.21.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="MSPUuapO" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=UHwV/d0vJ+VV/6rODpNoDW7EoH98/4XqdQPoHZOFARz1tieivrAhKMCIHrbri3oT1xlV8qoA1kK9Oci0ttnuJhdpzCuhBsLlxff7P5xAJ3gkhhw0PgyeQ/ns+WPPxfyiinz4/GzGhPm1FWzYMlS5ZvsGzFiOtntgmOvTjgjpojuhN6IKTOyQYtlAScPXOpfkTcxig+Df0yw78mOHZ1jEDcgm3Nhf14Y1s0/9AEajdhsN66JoeZgSCY8OV2YX7BFBs642PQUs2J0sQCi91UN+qC3zSRvxkmYfKTsbA2Pd8vycmXWtO7n0OXc07X2q91DlTZDdq9oOf5Mc0zsyQu9FYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xKzF2nPeJMZc/TEzPO9lzXdhY8kN2NWlNrZ/LDL9oZI=; b=VrevS/OkvODLNY4qvBJR4/OlfbMPl3CO8NwyH9RnVzO+aF6UqGn7JBVlvGKxUWZFiCb2MjHWOcdb594Xg6lC0E2HMYl2rsMbGnZxdShrdw4Bk5Nan5ZE1WPFfUqCS+mcjQJBS33YlXEL/UCJ+TcRJuWexLFt49sBqSBvbhTZrgAXl4cQ0abNHA2RKIIsb0BL2ObhdkAAo5VkZRD0S/x65pig3w5MBv0EinXHAzCi2IUbuZulSDPWOXL2s7XTfCHkHVh29GCaKee04YTv7tuSuyPBu8O/J3UpUwT8x2qhyCO2z7VuZYpYrHyfvZel+8qmhECjhByNQyAg+YGxebdE2Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xKzF2nPeJMZc/TEzPO9lzXdhY8kN2NWlNrZ/LDL9oZI=; b=MSPUuapOqxiWuk4UymyAcvI8Z2tdW6qAAX+nmqj3Qk+oj6EniQB4zBqtFHGMk6NA2v8Qo/eQVM57bttX8zeflbuIJ7B0wNfUYYWtdO3vArks97hZlDuN+vDmT8tTVNFCgH1RG73sJHxsa3xACTotzoDDwhJvo+ohP5D0g0/JhZc= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) by AM8PR04MB7794.eurprd04.prod.outlook.com (2603:10a6:20b:247::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7362.24; Thu, 7 Mar 2024 17:33:13 +0000 Received: from PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::3168:91:27c6:edf6]) by PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::3168:91:27c6:edf6%3]) with mapi id 15.20.7362.024; Thu, 7 Mar 2024 17:33:13 +0000 From: Frank Li Date: Thu, 07 Mar 2024 12:32:41 -0500 Subject: [PATCH v2 1/4] dmaengine: imx-sdma: Support allocate memory from internal SRAM (iram) Message-Id: <20240307-sdma_upstream-v2-1-e97305a43cf5@nxp.com> References: <20240307-sdma_upstream-v2-0-e97305a43cf5@nxp.com> In-Reply-To: <20240307-sdma_upstream-v2-0-e97305a43cf5@nxp.com> To: Vinod Koul , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, Frank Li , Nicolin Chen , Shengjiu Wang , Joy Zou , Daniel Baluta X-Mailer: b4 0.13-dev-c87ef X-Developer-Signature: v=1; a=ed25519-sha256; t=1709832785; l=4382; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=35WKrihwsy+0gjRgHH1219vF/6YHpbFAEnJbyCUA0F4=; b=vcZYt+q+JPNhDZADrJ8xEuQU2gQsKT0AhUjpPtWnLqayoowZlXem5NABkmNzGxC8/pQzoUE43 0jbU2gYQXx+AOcxroFBvl7J7zpDFzwr0rZj94HvbyKt9ab0aUy6o7Iv X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: SJ0PR13CA0065.namprd13.prod.outlook.com (2603:10b6:a03:2c4::10) To PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9642:EE_|AM8PR04MB7794:EE_ X-MS-Office365-Filtering-Correlation-Id: 1aba22f4-669a-448d-a139-08dc3eccaaa3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pBZpCuP/tWfUApXM4ucPGSbBKor7/vW7MYRtRNudmr84KQUOe98aRpFK9Vk6khZefqA5bIDWvBTAasyne4cLQ7ETjgLNK6nYJwVp4g7XnjAx8rWuETjt/RX7di1z/Vrc4l10KpbV2lye0vkHa7Nv8YACQBsTiURQ5/RW2Wiuj5HBFl9/yRubsMPl6WMvvzpgBNqXIBpyN7QTJur8iFeHAxhGf23w/6n7NOSuV6yBIAAMW/U78F467S37CbNoEAH5+GZ5drTWgaCu2FIvGsrbe0qr92HUuPz6TboyGioy8BepAaybEXdYugDT47RBLS/UDhSOVX1638UfOS8IBBp2RZJ+cAhm2WEZr2Cn/dnDJ0w/DcoEe5eillOwPTz2RiGIbbmFlnQn9/Mn64fc2ybJ5MerTxppW6VQhE6j7waYULyjXmhlELCnCbz23+uqDaya9oIuIo83LUJUwBNdDhTHudJT5lqIBZDVNZ/PnLP45JifJ48q8JWsVzTJYih5f1YzgY/IY3g3S07FsMaT9xhQ59PAwsEkmTUNXVGiUy4XQ0TibFenPK3pWQGy19gSkxRJ3fuNDdCiSxvonx+zJG0JE64pWXyFVqc5xUX+UoRybY9uYWzqVgizuKz9x3rVfinWmrh1QfaBjCcdpBxJEXaPAdwp46o/1EDoYcOe8k68n+m8JBKi+mk3VyFf3l5KFWY+DuSLKB9itPgMZ6jBqWMM26/eIC/wZoPTbLsOVmsBAns= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR04MB9642.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(376005)(38350700005);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?3wUVFbbN84Y7Ax+fZg3JxJeOpQIG?= =?utf-8?q?WnuU3HsAwAit+J7LEQsT8vG03DeqqH/4SnoR7G8TsS0OJ9sF1N/rh8yda8B+BOETD?= =?utf-8?q?+HS+X0rHBQr9nVnltqW40b6tIOXeTWHK+NEuq2B3Pmk5RYNuYDd3XAcxkP+i1UW7j?= =?utf-8?q?mv4VqK0S9DIqvzWTnspwvm7rfgDcFX/uERi+eolmBiABmlMEER8jA7j1qMp/x1qrO?= =?utf-8?q?XW1W8qCONMRVJ81Oj1LXaU6H09l+6H6aewhfYs1x720JaNVhW2lMB0J0nV31IgbsR?= =?utf-8?q?JvrgV7gy1uAb7Kw/5rJV8MFjr7qobJacK2+MreczSXvFpp09pK8Uca+tWWYYLUZbH?= =?utf-8?q?nRRDzUzo4yeq+4csFErLHyMDDkwT3bZhZBdah2g/G7Ld0jJb28ahVth/Ux75CgpiT?= =?utf-8?q?UPnWb1E0/q0EvRsFPLszR8VsHXZynldG3VF89x2cArAhYy9Unc/Y6VdbfFzfG5WFa?= =?utf-8?q?/Hq98vBAKYinepiR2BR6ox3qIeErYDHCcVNJVP8UlfVvr2V1ia2KddIedJunqGU8c?= =?utf-8?q?9FwfJx+JfiGvhHOmjKR9PGPsFATFi0gfNlTedTIVw50xWjXqVe9AMlLzmkOUR3bbC?= =?utf-8?q?TCvDVCEO+n9APnKN4bkcXdSDcR9y5p8ZoirBkD3wXg+wIF4mn340wW2/se6ssC9nr?= =?utf-8?q?Hmuie/6M+kUqEOVWrIkFSH0l74TP0G11VkFgdCR19CIrtffYa4nEJK7ZC7B8urhXs?= =?utf-8?q?/rzqWwoKqhhfazLhtsnehwCed7Y67k9/t/Gy8g0yrwhHz8i595u1/g5PGhW+lExhZ?= =?utf-8?q?XYdqmfu5V296VMYkudhtkeKEX8xAuSJXMfTBR6xoTsbBHEGyUIZ2hlzqw80V9HiSo?= =?utf-8?q?0xecMp83dZvqRUCsAWiWN67hwVnhrWn4ed1C3hJYEashs6B6T96QH/pySMzpoBmql?= =?utf-8?q?TKhSBEHJGbKqeKxaV7b4nHD4HdVv5TOIn/tYWJ4qvAxL3ljgDVml4U6LoSFou621k?= =?utf-8?q?8vGomM/x/5yOmbVvBn/9ezi7FtqgLcikgkzWZhxxxxAY1ldlSZmL2T2j48eI68rRj?= =?utf-8?q?DwPz9wlK+6K/OVSQq4ibHFgAFx1qHqARvPiIf1Q2/9A8hfTyvKed9mDwplOq+LUzD?= =?utf-8?q?Cbxxe8G3W4hO9GHF3nejd9mfgYxGToqypaDVUpr800xuRC9EHf4lcgk4uHpsLxgJl?= =?utf-8?q?ZqCJiJ76hK53oyaBFw7WouN50PjjwFq2Ntde3T4SxAL14OeoIry65neB1hUEOSlSr?= =?utf-8?q?4xqYsuJ3NyJdN4BJXvwOA/Ck34OVzvCW2nCyA4V3yRt/YgsN78ZzvYAJPMbjErevb?= =?utf-8?q?p/EiwLDJawg7KQ1j92tr44XdZIitYA8ELYTydeodoXoDccIjUs7EoVvYosRgI2s/n?= =?utf-8?q?dzwzRD0m6IaPpPK/Vrw/ya/CSORqpqG9qDDjFXvPi1C0+rAEoHinEURK9E+jL1PlZ?= =?utf-8?q?A+jaTCXPgmme5E1hGckvMOIpD9AJGgoFcmkdM/RJGCrnScjb9EqmyJPgEX+gc/zaw?= =?utf-8?q?1EQyr8Xir7ubIfrBtOG4CPQ1liiZGC/+Tgl7HWs2ZIePworZ0aQLwpVE6cWw6qL6Y?= =?utf-8?q?biZxD0dZKmOW?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1aba22f4-669a-448d-a139-08dc3eccaaa3 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Mar 2024 17:33:13.8110 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: RZc6s2AYkgHGjLCc8TPeAdtmWksSDzsZKgzzewPbCU1XTYpHp6MBzjNZnFAKQtW3V7j9weaNwEpqIz1q6fAXpw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB7794 From: Nicolin Chen Allocate memory from SoC internal SRAM to reduce DDR access and keep DDR in lower power state (such as self-referesh) longer. Check iram_pool before sdma_init() so that ccb/context could be allocated from iram because DDR maybe in self-referesh in lower power audio case while sdma still running. Reviewed-by: Shengjiu Wang Signed-off-by: Nicolin Chen Signed-off-by: Joy Zou Reviewed-by: Daniel Baluta Signed-off-by: Frank Li --- drivers/dma/imx-sdma.c | 46 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 9b42f5e96b1e0..4f1a9d1b152d6 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -531,6 +532,7 @@ struct sdma_engine { /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/ bool clk_ratio; bool fw_loaded; + struct gen_pool *iram_pool; }; static int sdma_config_write(struct dma_chan *chan, @@ -1358,8 +1360,14 @@ static int sdma_request_channel0(struct sdma_engine *sdma) { int ret = -EBUSY; - sdma->bd0 = dma_alloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys, - GFP_NOWAIT); + if (sdma->iram_pool) + sdma->bd0 = gen_pool_dma_alloc(sdma->iram_pool, + sizeof(struct sdma_buffer_descriptor), + &sdma->bd0_phys); + else + sdma->bd0 = dma_alloc_coherent(sdma->dev, + sizeof(struct sdma_buffer_descriptor), + &sdma->bd0_phys, GFP_NOWAIT); if (!sdma->bd0) { ret = -ENOMEM; goto out; @@ -1379,10 +1387,14 @@ static int sdma_request_channel0(struct sdma_engine *sdma) static int sdma_alloc_bd(struct sdma_desc *desc) { u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor); + struct sdma_engine *sdma = desc->sdmac->sdma; int ret = 0; - desc->bd = dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, - &desc->bd_phys, GFP_NOWAIT); + if (sdma->iram_pool) + desc->bd = gen_pool_dma_alloc(sdma->iram_pool, bd_size, &desc->bd_phys); + else + desc->bd = dma_alloc_coherent(sdma->dev, bd_size, &desc->bd_phys, GFP_NOWAIT); + if (!desc->bd) { ret = -ENOMEM; goto out; @@ -1394,9 +1406,12 @@ static int sdma_alloc_bd(struct sdma_desc *desc) static void sdma_free_bd(struct sdma_desc *desc) { u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor); + struct sdma_engine *sdma = desc->sdmac->sdma; - dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, - desc->bd_phys); + if (sdma->iram_pool) + gen_pool_free(sdma->iram_pool, (unsigned long)desc->bd, bd_size); + else + dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, desc->bd_phys); } static void sdma_desc_free(struct virt_dma_desc *vd) @@ -2068,6 +2083,7 @@ static int sdma_init(struct sdma_engine *sdma) { int i, ret; dma_addr_t ccb_phys; + int ccbsize; ret = clk_enable(sdma->clk_ipg); if (ret) @@ -2083,10 +2099,14 @@ static int sdma_init(struct sdma_engine *sdma) /* Be sure SDMA has not started yet */ writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); - sdma->channel_control = dma_alloc_coherent(sdma->dev, - MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control) + - sizeof(struct sdma_context_data), - &ccb_phys, GFP_KERNEL); + ccbsize = MAX_DMA_CHANNELS * (sizeof(struct sdma_channel_control) + + sizeof(struct sdma_context_data)); + + if (sdma->iram_pool) + sdma->channel_control = gen_pool_dma_alloc(sdma->iram_pool, ccbsize, &ccb_phys); + else + sdma->channel_control = dma_alloc_coherent(sdma->dev, ccbsize, &ccb_phys, + GFP_KERNEL); if (!sdma->channel_control) { ret = -ENOMEM; @@ -2272,6 +2292,12 @@ static int sdma_probe(struct platform_device *pdev) vchan_init(&sdmac->vc, &sdma->dma_device); } + if (np) { + sdma->iram_pool = of_gen_pool_get(np, "iram", 0); + if (sdma->iram_pool) + dev_info(&pdev->dev, "alloc bd from iram.\n"); + } + ret = sdma_init(sdma); if (ret) goto err_init;