| Message ID | 20240321080228.24147-2-bin.yao@ingenic.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/2] dmaengine: ingenic: add Ingenic PDMA controller support. | expand |
On 21/03/2024 09:02, bin.yao@ingenic.com wrote: > From: "bin.yao" <bin.yao@ingenic.com> > > Convert the textual documentation for the Ingenic SoCs PDMA Controller I don't see any conversion here. > devicetree binding to YAML. > > Signed-off-by: bin.yao <bin.yao@ingenic.com> Are you sure this is Latin transliteration of your name? With a dot in between? Looks like email login... > --- > .../devicetree/bindings/dma/ingenic,pdma.yaml | 67 +++++++++++++++++++ > include/dt-bindings/dma/ingenic-pdma.h | 45 +++++++++++++ > 2 files changed, 112 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/ingenic,pdma.yaml > create mode 100644 include/dt-bindings/dma/ingenic-pdma.h > > diff --git a/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml > new file mode 100644 > index 000000000000..290dbf182a01 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Ingenic SoCs PDMA Controller > + > +maintainers: > + - bin.yao <bin.yao@ingenic.com> > + What is PDMA? Why this is not DMA? Provide description explaining this. > +allOf: > + - $ref: dma-controller.yaml# > + > +properties: > + compatible: > + enum: > + - ingenic,t33-pdma There is no such soc like t33 so far. Please point me to SoC/board/other bindings. > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + interrupts-names: > + const: pdma Drop names, not needed. > + > + "#dma-cells": > + const: 1 > + > + dma-channels: > + const: 32 Drop property, not needed. > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: gate_pdma Drop names, not needed. > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupts-names > + - "#dma-cells" > + - dma-channels > + - clocks > + - clock-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/ingenic,jz4780-cgu.h> > + pdma:dma@13420000 { Drop label. Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation It does not look like you tested the bindings, at least after quick look. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Maybe you need to update your dtschema and yamllint. > + compatible = "ingenic,t33-pdma"; > + reg = <0x13420000 0x10000>; > + interrupt-parent = <&intc>; > + interrupt-names = "pdma"; > + interrupts = <10>; > + #dma-cells = <0x1>; That's not hex! > + dma-channels = <0x20>; > + clocks = <&cgu JZ4780_CLK_PDMA>; > + clock-names = "gate_pdma"; > + }; > + > diff --git a/include/dt-bindings/dma/ingenic-pdma.h b/include/dt-bindings/dma/ingenic-pdma.h > new file mode 100644 > index 000000000000..66188d588232 > --- /dev/null > +++ b/include/dt-bindings/dma/ingenic-pdma.h Same filename as binding. > @@ -0,0 +1,45 @@ > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > +/* > + * Copyright (C) 2024 Ingenic Semiconductor Co., Ltd. > + * Author: bin.yao <bin.yao@ingenic.com> > + */ > + > +#ifndef __DT_BINDINGS_INGENIC_PDMA_H__ > +#define __DT_BINDINGS_INGENIC_PDMA_H__ > + > +/* > + * Request type numbers for the INGENIC DMA controller. > + */ > +#define INGENIC_DMA_REQ_AIC_LOOP_RX 0x5 IDs start from 0, not 5. IDs are decimal, not hex. Best regards, Krzysztof
On Thu, 21 Mar 2024 16:02:28 +0800, bin.yao@ingenic.com wrote: > From: "bin.yao" <bin.yao@ingenic.com> > > Convert the textual documentation for the Ingenic SoCs PDMA Controller > devicetree binding to YAML. > > Signed-off-by: bin.yao <bin.yao@ingenic.com> > --- > .../devicetree/bindings/dma/ingenic,pdma.yaml | 67 +++++++++++++++++++ > include/dt-bindings/dma/ingenic-pdma.h | 45 +++++++++++++ > 2 files changed, 112 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/ingenic,pdma.yaml > create mode 100644 include/dt-bindings/dma/ingenic-pdma.h > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/ingenic,pdma.example.dtb: dma@13420000: $nodename:0: 'dma@13420000' does not match '^dma-controller(@.*)?$' from schema $id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/ingenic,pdma.example.dtb: dma@13420000: 'interrupts-names' is a required property from schema $id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/ingenic,pdma.example.dtb: dma@13420000: Unevaluated properties are not allowed ('interrupt-names' was unexpected) from schema $id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240321080228.24147-2-bin.yao@ingenic.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
diff --git a/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml new file mode 100644 index 000000000000..290dbf182a01 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/ingenic,pdma.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ingenic,pdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs PDMA Controller + +maintainers: + - bin.yao <bin.yao@ingenic.com> + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + enum: + - ingenic,t33-pdma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupts-names: + const: pdma + + "#dma-cells": + const: 1 + + dma-channels: + const: 32 + + clocks: + maxItems: 1 + + clock-names: + const: gate_pdma + +required: + - compatible + - reg + - interrupts + - interrupts-names + - "#dma-cells" + - dma-channels + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/ingenic,jz4780-cgu.h> + pdma:dma@13420000 { + compatible = "ingenic,t33-pdma"; + reg = <0x13420000 0x10000>; + interrupt-parent = <&intc>; + interrupt-names = "pdma"; + interrupts = <10>; + #dma-cells = <0x1>; + dma-channels = <0x20>; + clocks = <&cgu JZ4780_CLK_PDMA>; + clock-names = "gate_pdma"; + }; + diff --git a/include/dt-bindings/dma/ingenic-pdma.h b/include/dt-bindings/dma/ingenic-pdma.h new file mode 100644 index 000000000000..66188d588232 --- /dev/null +++ b/include/dt-bindings/dma/ingenic-pdma.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +/* + * Copyright (C) 2024 Ingenic Semiconductor Co., Ltd. + * Author: bin.yao <bin.yao@ingenic.com> + */ + +#ifndef __DT_BINDINGS_INGENIC_PDMA_H__ +#define __DT_BINDINGS_INGENIC_PDMA_H__ + +/* + * Request type numbers for the INGENIC DMA controller. + */ +#define INGENIC_DMA_REQ_AIC_LOOP_RX 0x5 +#define INGENIC_DMA_REQ_AIC_TX 0x6 +#define INGENIC_DMA_REQ_AIC_F_RX 0x7 +#define INGENIC_DMA_REQ_AUTO_TX 0x8 +#define INGENIC_DMA_REQ_SADC_RX 0x9 +#define INGENIC_DMA_REQ_UART5_TX 0xa +#define INGENIC_DMA_REQ_UART5_RX 0xb +#define INGENIC_DMA_REQ_UART4_TX 0xc +#define INGENIC_DMA_REQ_UART4_RX 0xd +#define INGENIC_DMA_REQ_UART3_TX 0xe +#define INGENIC_DMA_REQ_UART3_RX 0xf +#define INGENIC_DMA_REQ_UART2_TX 0x10 +#define INGENIC_DMA_REQ_UART2_RX 0x11 +#define INGENIC_DMA_REQ_UART1_TX 0x12 +#define INGENIC_DMA_REQ_UART1_RX 0x13 +#define INGENIC_DMA_REQ_UART0_TX 0x14 +#define INGENIC_DMA_REQ_UART0_RX 0x15 +#define INGENIC_DMA_REQ_SSI0_TX 0x16 +#define INGENIC_DMA_REQ_SSI0_RX 0x17 +#define INGENIC_DMA_REQ_SSI1_TX 0x18 +#define INGENIC_DMA_REQ_SSI1_RX 0x19 +#define INGENIC_DMA_REQ_SLV_TX 0x1a +#define INGENIC_DMA_REQ_SLV_RX 0x1b +#define INGENIC_DMA_REQ_I2C0_TX 0x24 +#define INGENIC_DMA_REQ_I2C0_RX 0x25 +#define INGENIC_DMA_REQ_I2C1_TX 0x26 +#define INGENIC_DMA_REQ_I2C1_RX 0x27 +#define INGENIC_DMA_REQ_I2C2_TX 0x28 +#define INGENIC_DMA_REQ_I2C2_RX 0x29 +#define INGENIC_DMA_REQ_DES_TX 0x2e +#define INGENIC_DMA_REQ_DES_RX 0x2f + +#endif /* __DT_BINDINGS_INGENIC_PDMA_H__ */