diff mbox series

[v2] dmaengine: dw-edma: Move "Set consumer cycle" into first condition in dw_hdma_v0_core_start()

Message ID 20240722030405.3385-1-zhengdongxiong@gxmicro.cn (mailing list archive)
State New
Headers show
Series [v2] dmaengine: dw-edma: Move "Set consumer cycle" into first condition in dw_hdma_v0_core_start() | expand

Commit Message

dongxiong zheng July 22, 2024, 3:04 a.m. UTC 
Reference: Chapter 6.4.9.1 LL Operation Overview:
"Figure 6-23 Linked List Flow for Producer and Consumer" in
DesignWare Cores PCI Express Controller Databook (Version 6.00a June 2022)

Signed-off-by: dongxiong zheng <zhengdongxiong@gxmicro.cn>
---
 drivers/dma/dw-edma/dw-hdma-v0-core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c
index 10e8f0715..d77051d1e 100644
--- a/drivers/dma/dw-edma/dw-hdma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c
@@ -262,10 +262,10 @@  static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
 			  lower_32_bits(chunk->ll_region.paddr));
 		SET_CH_32(dw, chan->dir, chan->id, llp.msb,
 			  upper_32_bits(chunk->ll_region.paddr));
+		/* Set consumer cycle */
+		SET_CH_32(dw, chan->dir, chan->id, cycle_sync,
+			HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT);
 	}
-	/* Set consumer cycle */
-	SET_CH_32(dw, chan->dir, chan->id, cycle_sync,
-		  HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT);
 
 	dw_hdma_v0_sync_ll_data(chunk);