| Message ID | 20240919185151.7331-1-fancer.lancer@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] dmaengine: dw: Select only supported masters for ACPI devices | expand |
On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote: > The recently submitted fix-commit revealed a problem in the iDMA32 > platform code. Even though the controller supported only a single master > the dw_dma_acpi_filter() method hard-coded two master interfaces with IDs > 0 and 1. As a result the sanity check implemented in the commit > b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") got > incorrect interface data width and thus prevented the client drivers > from configuring the DMA-channel with the EINVAL error returned. E.g. the > next error was printed for the PXA2xx SPI controller driver trying to > configure the requested channels: > > > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed > > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX descriptor > > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16 > > The problem would have been spotted much earlier if the iDMA32 controller > supported more than one master interfaces. But since it supports just a > single master and the iDMA32-specific code just ignores the master IDs in > the CTLLO preparation method, the issue has been gone unnoticed so far. > > Fix the problem by specifying a single master ID for both memory and > peripheral devices on the ACPI-based platforms if there is only one master > available on the controller. Thus the issue noticed for the iDMA32 > controllers will be eliminated and the ACPI-probed DW DMA controllers will > be configured with the correct master ID by default. Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Seems this fixes the bug I have seen. Ferry, can you confirm?
Hi, Op donderdag 19 september 2024 22:06:24 CEST schreef Andy Shevchenko: > On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote: > > The recently submitted fix-commit revealed a problem in the iDMA32 > > platform code. Even though the controller supported only a single master > > the dw_dma_acpi_filter() method hard-coded two master interfaces with IDs > > 0 and 1. As a result the sanity check implemented in the commit > > b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") got > > incorrect interface data width and thus prevented the client drivers > > from configuring the DMA-channel with the EINVAL error returned. E.g. the > > next error was printed for the PXA2xx SPI controller driver trying to > > configure the requested channels: > > > > > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed > > > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX descriptor > > > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16 > > > > The problem would have been spotted much earlier if the iDMA32 controller > > supported more than one master interfaces. But since it supports just a > > single master and the iDMA32-specific code just ignores the master IDs in > > the CTLLO preparation method, the issue has been gone unnoticed so far. > > > > Fix the problem by specifying a single master ID for both memory and > > peripheral devices on the ACPI-based platforms if there is only one master > > available on the controller. Thus the issue noticed for the iDMA32 > > controllers will be eliminated and the ACPI-probed DW DMA controllers will > > be configured with the correct master ID by default. > > Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Seems this fixes the bug I have seen. > Ferry, can you confirm? I was testing something else and broke my setup :-( I’ll fix that and test this patch this weekend.
On Fri, Sep 20, 2024 at 10:52:18AM +0200, Ferry Toth wrote: > Op donderdag 19 september 2024 22:06:24 CEST schreef Andy Shevchenko: > > On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote: ... > > > Fix the problem by specifying a single master ID for both memory and > > > peripheral devices on the ACPI-based platforms if there is only one master > > > available on the controller. Thus the issue noticed for the iDMA32 > > > controllers will be eliminated and the ACPI-probed DW DMA controllers will > > > be configured with the correct master ID by default. > > > > Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > Seems this fixes the bug I have seen. > > Ferry, can you confirm? > I was testing something else and broke my setup :-( > I’ll fix that and test this patch this weekend. Thinking about this more I believe it's not the best what we can do. Because this leaves a potential gap for the devices of more than one master but in different order. I'll send another patch after my testing.
diff --git a/drivers/dma/dw/acpi.c b/drivers/dma/dw/acpi.c index c510c109d2c3..806620f5a406 100644 --- a/drivers/dma/dw/acpi.c +++ b/drivers/dma/dw/acpi.c @@ -8,6 +8,7 @@ static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param) { + struct dw_dma *dw = to_dw_dma(chan->device); struct acpi_dma_spec *dma_spec = param; struct dw_dma_slave slave = { .dma_dev = dma_spec->dev, @@ -17,6 +18,13 @@ static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param) .p_master = 1, }; + /* + * Fallback to using a single interface for both memory and peripheral + * device if there is only one master I/F supported (e.g. iDMA32) + */ + if (dw->pdata->nr_masters == 1) + slave.p_master = 0; + return dw_dma_filter(chan, &slave); }
The recently submitted fix-commit revealed a problem in the iDMA32 platform code. Even though the controller supported only a single master the dw_dma_acpi_filter() method hard-coded two master interfaces with IDs 0 and 1. As a result the sanity check implemented in the commit b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") got incorrect interface data width and thus prevented the client drivers from configuring the DMA-channel with the EINVAL error returned. E.g. the next error was printed for the PXA2xx SPI controller driver trying to configure the requested channels: > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX descriptor > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16 The problem would have been spotted much earlier if the iDMA32 controller supported more than one master interfaces. But since it supports just a single master and the iDMA32-specific code just ignores the master IDs in the CTLLO preparation method, the issue has been gone unnoticed so far. Fix the problem by specifying a single master ID for both memory and peripheral devices on the ACPI-based platforms if there is only one master available on the controller. Thus the issue noticed for the iDMA32 controllers will be eliminated and the ACPI-probed DW DMA controllers will be configured with the correct master ID by default. Cc: stable@vger.kernel.org Fixes: b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") Fixes: 199244d69458 ("dmaengine: dw: add support of iDMA 32-bit hardware") Reported-by: Ferry Toth <fntoth@gmail.com> Closes: https://lore.kernel.org/dmaengine/ZuXbCKUs1iOqFu51@black.fi.intel.com/ Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Closes: https://lore.kernel.org/dmaengine/ZuXgI-VcHpMgbZ91@black.fi.intel.com/ Signed-off-by: Serge Semin <fancer.lancer@gmail.com> --- Note I haven't got any device with the Intel Merrifield iDMA32 + SPI PXA2xx pair to test out the solution. So any tests are very welcome. But based on Andy' (see the reported-by links) and my investigations the fix seems correct. Link: https://lore.kernel.org/dmaengine/20240919135854.16124-1-fancer.lancer@gmail.com/ Changelog v2: - Implement only the "fallback" conditional statement (@Andy) - Fix incorrect NoF masters literal (@Andy) - Drop redundant empty line (@Andy) --- drivers/dma/dw/acpi.c | 8 ++++++++ 1 file changed, 8 insertions(+)