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Tue, 15 Oct 2024 12:08:27 GMT Received: from hu-jseerapu-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 15 Oct 2024 05:08:21 -0700 From: Jyothi Kumar Seerapu To: Vinod Koul , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Bjorn Andersson" , Konrad Dybcio , Andi Shyti , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= CC: , , , , , , , , , , Subject: [PATCH v1 3/5] dmaengine: qcom: gpi: Add provision to support TRE size as the fourth argument of dma-cells property Date: Tue, 15 Oct 2024 17:37:48 +0530 Message-ID: <20241015120750.21217-4-quic_jseerapu@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241015120750.21217-1-quic_jseerapu@quicinc.com> References: <20241015120750.21217-1-quic_jseerapu@quicinc.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: F8Yq6o2FdINgvP5nTWcx35aTMAssJSks X-Proofpoint-ORIG-GUID: F8Yq6o2FdINgvP5nTWcx35aTMAssJSks X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 spamscore=0 priorityscore=1501 adultscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 phishscore=0 malwarescore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410150083 The current GPI driver hardcodes the channel TRE (Transfer Ring Element) size to 64. For scenarios requiring high performance with multiple messages in a transfer, use Block Event Interrupt (BEI). This method triggers interrupt after specific message transfers and the last message transfer, effectively reducing the number of interrupts. For multiple transfers utilizing BEI, a channel TRE size of 64 is insufficient and may lead to transfer failures, indicated by errors related to unavailable memory space. Added provision to modify the channel TRE size via the device tree. The Default channel TRE size is set to 64, but this value can update in the device tree which will then be parsed by the GPI driver. Signed-off-by: Jyothi Kumar Seerapu --- drivers/dma/qcom/gpi.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index 52a7c8f2498f..3c89b4a88ac1 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -234,7 +234,7 @@ enum msm_gpi_tce_code { #define GPI_RX_CHAN (1) #define STATE_IGNORE (U32_MAX) #define EV_FACTOR (2) -#define REQ_OF_DMA_ARGS (5) /* # of arguments required from client */ +#define REQ_OF_DMA_ARGS (3) /* # of arguments required from client */ #define CHAN_TRES 64 struct __packed xfer_compl_event { @@ -481,6 +481,7 @@ struct gchan { u32 chid; u32 seid; u32 protocol; + u32 num_chan_tres; struct gpii *gpii; enum gpi_ch_state ch_state; enum gpi_pm_state pm_state; @@ -1903,8 +1904,8 @@ static int gpi_ch_init(struct gchan *gchan) } /* allocate memory for event ring */ - elements = CHAN_TRES << ev_factor; - ret = gpi_alloc_ring(&gpii->ev_ring, elements, + elements = max(gpii->gchan[0].num_chan_tres, gpii->gchan[1].num_chan_tres); + ret = gpi_alloc_ring(&gpii->ev_ring, elements << ev_factor, sizeof(union gpi_event), gpii); if (ret) goto exit_gpi_init; @@ -2042,7 +2043,7 @@ static int gpi_alloc_chan_resources(struct dma_chan *chan) mutex_lock(&gpii->ctrl_lock); /* allocate memory for transfer ring */ - ret = gpi_alloc_ring(&gchan->ch_ring, CHAN_TRES, + ret = gpi_alloc_ring(&gchan->ch_ring, gchan->num_chan_tres, sizeof(struct gpi_tre), gpii); if (ret) goto xfer_alloc_err; @@ -2107,9 +2108,9 @@ static struct dma_chan *gpi_of_dma_xlate(struct of_phandle_args *args, int gpii; struct gchan *gchan; - if (args->args_count < 3) { - dev_err(gpi_dev->dev, "gpii require minimum 2 args, client passed:%d args\n", - args->args_count); + if (args->args_count < REQ_OF_DMA_ARGS) { + dev_err(gpi_dev->dev, "gpii require minimum %d args, client passed:%d args\n", + REQ_OF_DMA_ARGS, args->args_count); return NULL; } @@ -2138,6 +2139,16 @@ static struct dma_chan *gpi_of_dma_xlate(struct of_phandle_args *args, gchan->seid = seid; gchan->protocol = args->args[2]; + /* + * If the channel tre size entry is present in device tree and + * channel tre size is greater than 64 then parse the value from + * the device tree, otherwise use the default value, which is 64. + */ + if (args->args_count > REQ_OF_DMA_ARGS && args->args[3] > CHAN_TRES) + gchan->num_chan_tres = args->args[3]; + else + gchan->num_chan_tres = CHAN_TRES; + return dma_get_slave_channel(&gchan->vc.chan); }