@@ -191,6 +191,7 @@ static int qce_crypto_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct qce_device *qce;
+ struct resource *res;
int ret;
qce = devm_kzalloc(dev, sizeof(*qce), GFP_KERNEL);
@@ -200,7 +201,7 @@ static int qce_crypto_probe(struct platform_device *pdev)
qce->dev = dev;
platform_set_drvdata(pdev, qce);
- qce->base = devm_platform_ioremap_resource(pdev, 0);
+ qce->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
if (IS_ERR(qce->base))
return PTR_ERR(qce->base);
@@ -246,7 +247,18 @@ static int qce_crypto_probe(struct platform_device *pdev)
qce->async_req_enqueue = qce_async_request_enqueue;
qce->async_req_done = qce_async_request_done;
- return devm_qce_register_algs(qce);
+ ret = devm_qce_register_algs(qce);
+ if (ret)
+ return ret;
+
+ qce->base_dma = dma_map_resource(dev, res->start,
+ resource_size(res),
+ DMA_BIDIRECTIONAL, 0);
+ ret = dma_mapping_error(dev, qce->base_dma);
+ if (ret)
+ return ret;
+
+ return 0;
}
static const struct of_device_id qce_crypto_of_match[] = {
@@ -42,6 +42,7 @@ struct qce_device {
struct qce_dma_data dma;
int burst_size;
unsigned int pipe_pair_id;
+ dma_addr_t base_dma;
int (*async_req_enqueue)(struct qce_device *qce,
struct crypto_async_request *req);
void (*async_req_done)(struct qce_device *qce, int ret);
Get crypto base address from DT. This will use for command descriptor support for crypto register r/w via BAM/DMA. Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> --- Change in [v6] * No Change Change in [v5] * No Change Change in [v4] * Added error handling path for dma_map_resource() Change in [v3] * Added dma_unmap_resource() in qce_crypto_remove() Change in [v2] * Added crypto added read from device tree Change in [v1] * This patch was not included in [v1] drivers/crypto/qce/core.c | 16 ++++++++++++++-- drivers/crypto/qce/core.h | 1 + 2 files changed, 15 insertions(+), 2 deletions(-)