| Message ID | 20250116155220.3896947-3-mkumard@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Tegra ADMA fixes | expand |
On 16/01/2025 15:52, Mohan Kumar D wrote: > Have additional check for max channel page during the probe > to cover if any offset overshoot happens due to wrong DT > configuration. > > Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") > Cc: stable@vger.kernel.org > Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> > --- > drivers/dma/tegra210-adma.c | 7 ++++++- > drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c > index 258220c9cb50..393e8a8a5bc1 100644 > --- a/drivers/dma/tegra210-adma.c > +++ b/drivers/dma/tegra210-adma.c > @@ -83,7 +83,9 @@ struct tegra_adma; > * @nr_channels: Number of DMA channels available. > * @ch_fifo_size_mask: Mask for FIFO size field. > * @sreq_index_offset: Slave channel index offset. > + * @max_page: Maximum ADMA Channel Page. > * @has_outstanding_reqs: If DMA channel can have outstanding requests. > + * @set_global_pg_config: Global page programming. > */ > struct tegra_adma_chip_data { > unsigned int (*adma_get_burst_config)(unsigned int burst_size); > @@ -99,6 +101,7 @@ struct tegra_adma_chip_data { > unsigned int nr_channels; > unsigned int ch_fifo_size_mask; > unsigned int sreq_index_offset; > + unsigned int max_page; > bool has_outstanding_reqs; > void (*set_global_pg_config)(struct tegra_adma *tdma); > }; > @@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = { > .nr_channels = 22, > .ch_fifo_size_mask = 0xf, > .sreq_index_offset = 2, > + .max_page = 0, > .has_outstanding_reqs = false, > .set_global_pg_config = NULL, > }; > @@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = { > .nr_channels = 32, > .ch_fifo_size_mask = 0x1f, > .sreq_index_offset = 4, > + .max_page = 4, > .has_outstanding_reqs = true, > .set_global_pg_config = tegra186_adma_global_page_config, > }; > @@ -922,7 +927,7 @@ static int tegra_adma_probe(struct platform_device *pdev) > page_offset = lower_32_bits(res_page->start) - > lower_32_bits(res_base->start); > page_no = page_offset / cdata->ch_base_offset; > - if (page_no == 0) > + if (page_no == 0 || page_no > cdata->max_page) > return -EINVAL; > > tdma->ch_page_no = page_no - 1; > diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > index 45004f598e4d..2af939bab62b 100644 > --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c > @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, > writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, > cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); > > - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); > + //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); Looks like we need a V3! Jon
On 16-01-2025 21:24, Jon Hunter wrote: > > > On 16/01/2025 15:52, Mohan Kumar D wrote: >> Have additional check for max channel page during the probe >> to cover if any offset overshoot happens due to wrong DT >> configuration. >> >> Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") >> Cc: stable@vger.kernel.org >> Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> >> --- >> drivers/dma/tegra210-adma.c | 7 ++++++- >> drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- >> 2 files changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c >> index 258220c9cb50..393e8a8a5bc1 100644 >> --- a/drivers/dma/tegra210-adma.c >> +++ b/drivers/dma/tegra210-adma.c >> @@ -83,7 +83,9 @@ struct tegra_adma; >> * @nr_channels: Number of DMA channels available. >> * @ch_fifo_size_mask: Mask for FIFO size field. >> * @sreq_index_offset: Slave channel index offset. >> + * @max_page: Maximum ADMA Channel Page. >> * @has_outstanding_reqs: If DMA channel can have outstanding >> requests. >> + * @set_global_pg_config: Global page programming. >> */ >> struct tegra_adma_chip_data { >> unsigned int (*adma_get_burst_config)(unsigned int burst_size); >> @@ -99,6 +101,7 @@ struct tegra_adma_chip_data { >> unsigned int nr_channels; >> unsigned int ch_fifo_size_mask; >> unsigned int sreq_index_offset; >> + unsigned int max_page; >> bool has_outstanding_reqs; >> void (*set_global_pg_config)(struct tegra_adma *tdma); >> }; >> @@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data >> tegra210_chip_data = { >> .nr_channels = 22, >> .ch_fifo_size_mask = 0xf, >> .sreq_index_offset = 2, >> + .max_page = 0, >> .has_outstanding_reqs = false, >> .set_global_pg_config = NULL, >> }; >> @@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data >> tegra186_chip_data = { >> .nr_channels = 32, >> .ch_fifo_size_mask = 0x1f, >> .sreq_index_offset = 4, >> + .max_page = 4, >> .has_outstanding_reqs = true, >> .set_global_pg_config = tegra186_adma_global_page_config, >> }; >> @@ -922,7 +927,7 @@ static int tegra_adma_probe(struct >> platform_device *pdev) >> page_offset = lower_32_bits(res_page->start) - >> lower_32_bits(res_base->start); >> page_no = page_offset / cdata->ch_base_offset; >> - if (page_no == 0) >> + if (page_no == 0 || page_no > cdata->max_page) >> return -EINVAL; >> tdma->ch_page_no = page_no - 1; >> diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c >> b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c >> index 45004f598e4d..2af939bab62b 100644 >> --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c >> +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c >> @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct >> fsl_samsung_hdmi_phy *phy, >> writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, >> cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); >> - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); >> + //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); > > Looks like we need a V3! Oops! My bad, will remove this unwanted line change. > > Jon
diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c index 258220c9cb50..393e8a8a5bc1 100644 --- a/drivers/dma/tegra210-adma.c +++ b/drivers/dma/tegra210-adma.c @@ -83,7 +83,9 @@ struct tegra_adma; * @nr_channels: Number of DMA channels available. * @ch_fifo_size_mask: Mask for FIFO size field. * @sreq_index_offset: Slave channel index offset. + * @max_page: Maximum ADMA Channel Page. * @has_outstanding_reqs: If DMA channel can have outstanding requests. + * @set_global_pg_config: Global page programming. */ struct tegra_adma_chip_data { unsigned int (*adma_get_burst_config)(unsigned int burst_size); @@ -99,6 +101,7 @@ struct tegra_adma_chip_data { unsigned int nr_channels; unsigned int ch_fifo_size_mask; unsigned int sreq_index_offset; + unsigned int max_page; bool has_outstanding_reqs; void (*set_global_pg_config)(struct tegra_adma *tdma); }; @@ -854,6 +857,7 @@ static const struct tegra_adma_chip_data tegra210_chip_data = { .nr_channels = 22, .ch_fifo_size_mask = 0xf, .sreq_index_offset = 2, + .max_page = 0, .has_outstanding_reqs = false, .set_global_pg_config = NULL, }; @@ -871,6 +875,7 @@ static const struct tegra_adma_chip_data tegra186_chip_data = { .nr_channels = 32, .ch_fifo_size_mask = 0x1f, .sreq_index_offset = 4, + .max_page = 4, .has_outstanding_reqs = true, .set_global_pg_config = tegra186_adma_global_page_config, }; @@ -922,7 +927,7 @@ static int tegra_adma_probe(struct platform_device *pdev) page_offset = lower_32_bits(res_page->start) - lower_32_bits(res_base->start); page_no = page_offset / cdata->ch_base_offset; - if (page_no == 0) + if (page_no == 0 || page_no > cdata->max_page) return -EINVAL; tdma->ch_page_no = page_no - 1; diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 45004f598e4d..2af939bab62b 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -466,7 +466,7 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + //fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG(33));
Have additional check for max channel page during the probe to cover if any offset overshoot happens due to wrong DT configuration. Fixes: 68811c928f88 ("dmaengine: tegra210-adma: Support channel page") Cc: stable@vger.kernel.org Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> --- drivers/dma/tegra210-adma.c | 7 ++++++- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-)