From patchwork Tue Apr 14 08:43:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 6214181 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B8F41BF4A6 for ; Tue, 14 Apr 2015 08:43:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C9BF720212 for ; Tue, 14 Apr 2015 08:43:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7D1AA20251 for ; Tue, 14 Apr 2015 08:43:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752329AbbDNInr (ORCPT ); Tue, 14 Apr 2015 04:43:47 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:61675 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753239AbbDNInp (ORCPT ); Tue, 14 Apr 2015 04:43:45 -0400 Received: from wuerfel.localnet ([149.172.15.242]) by mrelayeu.kundenserver.de (mreue004) with ESMTPSA (Nemesis) id 0MIAwM-1YfCbv25XC-003tr9; Tue, 14 Apr 2015 10:43:05 +0200 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Rameshwar Prasad Sahu , vinod.koul@intel.com, dan.j.williams@intel.com, devicetree@vger.kernel.org, jcm@redhat.com, patches@apm.com, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Subject: Re: [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings Date: Tue, 14 Apr 2015 10:43:03 +0200 Message-ID: <4208569.BKk8XynHVe@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1428995040-11815-1-git-send-email-rsahu@apm.com> References: <1428995040-11815-1-git-send-email-rsahu@apm.com> MIME-Version: 1.0 X-Provags-ID: V03:K0:xpTllPp2VlfY4fKJF4FpZwPA9k8km9OHIYVp+dgHHA5xqp+tkN+ jM9ehMXrzEWHRcTTOwuwDujwpbl6HQ8v2QuQEKfqotbXO4bclnfSkZocZ34Zx1xYVWD7Lfy bKb8BIOJslI8zJynwAgnvgDO4yRgmQVr9Ge++nN1Ydq7vWfOpFHOyX/qe2u5JZmwGCpp+re LeNmyN/CwH+d5uVf0J80g== X-UI-Out-Filterresults: notjunk:1; Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tuesday 14 April 2015 12:34:00 Rameshwar Prasad Sahu wrote: > diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c > index aa61935..59f95db 100755 > --- a/drivers/dma/xgene-dma.c > +++ b/drivers/dma/xgene-dma.c > @@ -238,10 +238,10 @@ > dev_err(chan->dev, "%s: " fmt, chan->name, ##arg) > > struct xgene_dma_desc_hw { > - u64 m0; > - u64 m1; > - u64 m2; > - u64 m3; > + __le64 m0; > + __le64 m1; > + __le64 m2; > + __le64 m3; > }; This part looks good. > enum xgene_dma_ring_cfgsize { > @@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma) > return !(val & XGENE_DMA_PQ_DISABLE_MASK); > } > > -static void xgene_dma_cpu_to_le64(u64 *desc, int count) > +static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc) > { > - int i; > - > - for (i = 0; i < count; i++) > - desc[i] = cpu_to_le64(desc[i]); > + desc->m0 = cpu_to_le64(((u64 *)desc)[0]); > + desc->m1 = cpu_to_le64(((u64 *)desc)[1]); > + desc->m2 = cpu_to_le64(((u64 *)desc)[2]); > + desc->m3 = cpu_to_le64(((u64 *)desc)[3]); > } This part does not: you are circumventing the checks that are supposed to help you here, and make things harder to read in the process. > static u16 xgene_dma_encode_len(u32 len) > @@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan, > > skip_additional_src: > /* Hardware stores descriptor in little endian format */ > - xgene_dma_cpu_to_le64(desc1, 4); > + xgene_dma_cpu_to_le64(desc1); > if (desc2) > - xgene_dma_cpu_to_le64(desc2, 4); > + xgene_dma_cpu_to_le64(desc2); > } > > static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan, > @@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan, > } > > /* Hardware stores descriptor in little endian format */ > - xgene_dma_cpu_to_le64(desc1, 4); > - xgene_dma_cpu_to_le64(desc2, 4); > + xgene_dma_cpu_to_le64(desc1); > + xgene_dma_cpu_to_le64(desc2); > > /* Update meta data */ > *nbytes = len; All these calls should just be removed, and the accesses to the descriptor get changed to be little-endian. You can use the opportunity to remove a lot of the macros that make the code harder to understand, and open-code them like this: which will store the descriptors in the right format with correct endianess, make use of the sparse checking and let the reader see what's actually going on. Arnd --- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c index aa61935ee706..3e3854559ecc 100755 --- a/drivers/dma/xgene-dma.c +++ b/drivers/dma/xgene-dma.c @@ -446,12 +446,12 @@ static void *xgene_dma_lookup_ext8(u64 *desc, int idx) return (idx % 2) ? (desc + idx - 1) : (desc + idx + 1); } -static void xgene_dma_init_desc(void *desc, u16 dst_ring_num) +static void xgene_dma_init_desc(struct xgene_dma_desc_hw *desc, u16 dst_ring_num) { - XGENE_DMA_DESC_C_SET(desc); /* Coherent IO */ - XGENE_DMA_DESC_IN_SET(desc); - XGENE_DMA_DESC_H0ENQ_NUM_SET(desc, dst_ring_num); - XGENE_DMA_DESC_RTYPE_SET(desc, XGENE_DMA_RING_OWNER_DMA); + desc->m1 |= cpu_to_le64(XGENE_DMA_DESC_C_BIT); + desc->m0 |= cpu_to_le64(XGENE_DMA_DESC_IN_BIT); + desc->m3 |= cpu_to_le64(dst_ring_num << XGENE_DMA_DESC_HOENQ_NUM_POS); + desc->m0 |= cpu_to_le64(dst_ring_num << XGENE_DMA_RING_OWNER_DMA); }