diff mbox series

[3/3] : XDMA's channel Stream mode support

Message ID CALYqZ9=X6eLUQGUThiEYYfwErjC74HyBZAF5hoYucNQReoZvEA@mail.gmail.com (mailing list archive)
State Changes Requested
Headers show
Series : XDMA's channel Stream mode support | expand

Commit Message

Eric Debief June 5, 2024, 10:07 a.m. UTC 
From 0a2c8951b770e2791b5fa7f8ec242074bcbf5c1f Mon Sep 17 00:00:00 2001
From: Eric DEBIEF <debief@digigram.com>
Date: Mon, 27 May 2024 17:06:08 +0200
Subject: Add XDMA EOP support in C2H stream.

In XDMA'isr the C2H EOP condition is checked
with the Writeback descriptor.
If true, the stream transfer considered as completed.

Signed-off-by: Eric DEBIEF <debief@digigram.com>
---
 drivers/dma/xilinx/xdma-regs.h |  5 +++++
 drivers/dma/xilinx/xdma.c      | 18 +++++++++++++++++-
 2 files changed, 22 insertions(+), 1 deletion(-)

  * xdma_channel_isr - XDMA channel interrupt handler
  * @irq: IRQ number
@@ -941,7 +957,7 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
     u32 st;
     bool repeat_tx;

-    if (xchan->stop_requested)
+    if ((xchan->stop_requested) || xdma_is_c2h_eop(xchan))
         complete(&xchan->last_interrupt);

     spin_lock(&xchan->vchan.lock);
--
2.34.1
diff mbox series

Patch

diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h
index 780ac3c9d34d..5765f8f5eb96 100644
--- a/drivers/dma/xilinx/xdma-regs.h
+++ b/drivers/dma/xilinx/xdma-regs.h
@@ -100,6 +100,11 @@  struct xdma_hw_desc {
 #define XDMA_CHAN_IN_STREAM_MODE(id)    \
     (((u32)(id) & XDMA_CHAN_ID_STREAM_BIT) != 0)

+/* C2H Write back */
+#define XDMA_CHAN_C2H_WB_EOP_BIT        BIT(0)
+#define XDMA_CHAN_C2H_WB_MAGIC_VAL        (0x52B4 << 16)
+#define XDMA_CHAN_C2H_WB_MAGIC_MASK        GENMASK(31, 16)
+
 /* bits of the channel control register */
 #define CHAN_CTRL_RUN_STOP            BIT(0)
 #define CHAN_CTRL_IE_DESC_STOPPED        BIT(1)
diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c
index 3c7fcad761e8..247d775ffec2 100644
--- a/drivers/dma/xilinx/xdma.c
+++ b/drivers/dma/xilinx/xdma.c
@@ -925,6 +925,22 @@  static enum dma_status xdma_tx_status(struct
dma_chan *chan, dma_cookie_t cookie
     return ret;
 }

+
+/**
+ * xdma_is_c2h_eop - C2H channel End of Packet condition status
+ * @xchan : the XDMA channel to be checked
+ */
+static bool xdma_is_c2h_eop(struct xdma_chan *xchan)
+{
+    if ((xchan->c2h_wback != NULL) &&
+    ((xchan->c2h_wback->magic_status_bit & XDMA_CHAN_C2H_WB_MAGIC_MASK) ==
+                XDMA_CHAN_C2H_WB_MAGIC_VAL)) {
+        return (xchan->c2h_wback->magic_status_bit &
XDMA_CHAN_C2H_WB_EOP_BIT) != 0;
+    } else {
+        return false;
+    }
+}
+
 /**