From patchwork Thu Jan 2 15:09:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King X-Patchwork-Id: 3425561 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0ED899F381 for ; Thu, 2 Jan 2014 15:15:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B1892015A for ; Thu, 2 Jan 2014 15:15:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 033CF20145 for ; Thu, 2 Jan 2014 15:15:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752012AbaABPPa (ORCPT ); Thu, 2 Jan 2014 10:15:30 -0500 Received: from gw-1.arm.linux.org.uk ([78.32.30.217]:54169 "EHLO pandora.arm.linux.org.uk" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752174AbaABPPU (ORCPT ); Thu, 2 Jan 2014 10:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=pandora; h=Date:Sender:Message-Id:Subject:Cc:To:From:References:In-Reply-To; bh=LFgSmMPNjCC82ymDJ/WZz6Xp774UtqQGXnmxsNRrt7c=; b=KiAFCfcCCfP8nsLsV9R1zrISbiRev4TQfZmQMyDR0qgxRRGeqsxxzX5hgsrCcZi5hD0Tl9kOwvaxL1ZOHabhQVqIWP/BEdB0wdq4O4jbf7Rn96cfuzFEzXnF0F7YL4EoxPqfna//67h8vDxyJ1/63zKak/BKkrbdoCvppjE3yXo=; Received: from [2001:4d48:ad52:3201:222:68ff:fe15:37dd] (port=56289 helo=rmk-PC.arm.linux.org.uk) by pandora.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1VyjuA-0003bI-NY; Thu, 02 Jan 2014 15:09:50 +0000 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1VyjuA-0005EI-AA; Thu, 02 Jan 2014 15:09:50 +0000 In-Reply-To: <20140102150836.GA3826@n2100.arm.linux.org.uk> References: <20140102150836.GA3826@n2100.arm.linux.org.uk> From: Russell King To: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: Vinod Koul , Dan Williams Subject: [PATCH RFC 06/26] dmaengine: omap-dma: move reading of dma position to omap-dma.c Message-Id: Date: Thu, 02 Jan 2014 15:09:50 +0000 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Read the current DMA position from the hardware directly rather than via arch/arm/plat-omap/dma.c. Signed-off-by: Russell King --- drivers/dma/omap-dma.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 64 insertions(+), 2 deletions(-) diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index 8e2dd4f658d5..7e6cdc39725c 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c @@ -430,6 +430,68 @@ static size_t omap_dma_desc_size_pos(struct omap_desc *d, dma_addr_t addr) return size; } +static dma_addr_t omap_dma_get_src_pos(struct omap_chan *c) +{ + struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); + dma_addr_t addr; + + if (__dma_omap15xx(od->plat->dma_attr)) + addr = c->plat->dma_read(CPC, c->dma_ch); + else + addr = c->plat->dma_read(CSAC, c->dma_ch); + + if (od->plat->errata & DMA_ERRATA_3_3 && addr == 0) + addr = c->plat->dma_read(CSAC, c->dma_ch); + + if (!__dma_omap15xx(od->plat->dma_attr)) { + /* + * CDAC == 0 indicates that the DMA transfer on the channel has + * not been started (no data has been transferred so far). + * Return the programmed source start address in this case. + */ + if (c->plat->dma_read(CDAC, c->dma_ch)) + addr = c->plat->dma_read(CSAC, c->dma_ch); + else + addr = c->plat->dma_read(CSSA, c->dma_ch); + } + + if (dma_omap1()) + addr |= c->plat->dma_read(CSSA, c->dma_ch) & 0xffff0000; + + return addr; +} + +static dma_addr_t omap_dma_get_dst_pos(struct omap_chan *c) +{ + struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); + dma_addr_t addr; + + if (__dma_omap15xx(od->plat->dma_attr)) + addr = c->plat->dma_read(CPC, c->dma_ch); + else + addr = c->plat->dma_read(CDAC, c->dma_ch); + + /* + * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is + * read before the DMA controller finished disabling the channel. + */ + if (!__dma_omap15xx(od->plat->dma_attr) && addr == 0) { + addr = c->plat->dma_read(CDAC, c->dma_ch); + /* + * CDAC == 0 indicates that the DMA transfer on the channel has + * not been started (no data has been transferred so far). + * Return the programmed destination start address in this case. + */ + if (addr == 0) + addr = c->plat->dma_read(CDSA, c->dma_ch); + } + + if (dma_omap1()) + addr |= c->plat->dma_read(CDSA, c->dma_ch) & 0xffff0000; + + return addr; +} + static enum dma_status omap_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { @@ -451,9 +513,9 @@ static enum dma_status omap_dma_tx_status(struct dma_chan *chan, dma_addr_t pos; if (d->dir == DMA_MEM_TO_DEV) - pos = omap_get_dma_src_pos(c->dma_ch); + pos = omap_dma_get_src_pos(c); else if (d->dir == DMA_DEV_TO_MEM) - pos = omap_get_dma_dst_pos(c->dma_ch); + pos = omap_dma_get_dst_pos(c); else pos = 0;