From patchwork Thu Jan 2 15:10:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King X-Patchwork-Id: 3425321 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 24146C02DC for ; Thu, 2 Jan 2014 15:15:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 012632015A for ; Thu, 2 Jan 2014 15:15:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E8F192015E for ; Thu, 2 Jan 2014 15:15:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751983AbaABPPD (ORCPT ); Thu, 2 Jan 2014 10:15:03 -0500 Received: from gw-1.arm.linux.org.uk ([78.32.30.217]:54169 "EHLO pandora.arm.linux.org.uk" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751943AbaABPPC (ORCPT ); Thu, 2 Jan 2014 10:15:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=pandora; h=Date:Sender:Message-Id:Subject:Cc:To:From:References:In-Reply-To; bh=KEO3ZIm0ryfrAVabrzjdqfW5a6ifSRHodYjan4h/tEo=; b=ALaiW5L37AWdzSwQFhRQu9q6JUO64zysfz8AHsrsD+Hk5Bn4CdfFMyatpRI52GGDHaKI7aI8gW78QMQ0BFZlMAcsi8cL5GuSCojZiVGAb2Rk2RHq97Unb/ZRDpi9oDmACJov0BjkFNyaJS9AdVeFd9tQx26trY67hrScjGxzZn8=; Received: from [fd8f:7570:feb6:1:222:68ff:fe15:37dd] (port=48539 helo=rmk-PC.arm.linux.org.uk) by pandora.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1Vyjuz-0003cl-CA; Thu, 02 Jan 2014 15:10:41 +0000 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1Vyjuy-0005Ef-Rl; Thu, 02 Jan 2014 15:10:40 +0000 In-Reply-To: <20140102150836.GA3826@n2100.arm.linux.org.uk> References: <20140102150836.GA3826@n2100.arm.linux.org.uk> From: Russell King To: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: Vinod Koul , Dan Williams Subject: [PATCH RFC 11/26] dmaengine: omap-dma: consolidate clearing channel status register Message-Id: Date: Thu, 02 Jan 2014 15:10:40 +0000 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Russell King --- drivers/dma/omap-dma.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index ba0e10db5185..574f38e3fead 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c @@ -168,6 +168,14 @@ static void omap_dma_desc_free(struct virt_dma_desc *vd) kfree(container_of(vd, struct omap_desc, vd)); } +static void omap_dma_clear_csr(struct omap_chan *c) +{ + if (dma_omap1()) + c->plat->dma_read(CSR, c->dma_ch); + else + c->plat->dma_write(~0, CSR, c->dma_ch); +} + static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) { struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); @@ -190,11 +198,7 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) } else if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS) c->plat->dma_write(c->dma_ch, CLNK_CTRL, c->dma_ch); - /* Clear CSR */ - if (dma_omap1()) - c->plat->dma_read(CSR, c->dma_ch); - else - c->plat->dma_write(~0, CSR, c->dma_ch); + omap_dma_clear_csr(c); /* Enable interrupts */ c->plat->dma_write(d->cicr, CICR, c->dma_ch); @@ -213,11 +217,7 @@ static void omap_dma_stop(struct omap_chan *c) /* disable irq */ c->plat->dma_write(0, CICR, c->dma_ch); - /* Clear CSR */ - if (dma_omap1()) - c->plat->dma_read(CSR, c->dma_ch); - else - c->plat->dma_write(~0, CSR, c->dma_ch); + omap_dma_clear_csr(c); val = c->plat->dma_read(CCR, c->dma_ch); if (od->plat->errata & DMA_ERRATA_i541 && val & CCR_TRIGGER_SRC) {