From patchwork Tue Aug 29 08:47:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 9926929 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5AEA36022E for ; Tue, 29 Aug 2017 08:53:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A83A27FC0 for ; Tue, 29 Aug 2017 08:53:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3DECE28888; Tue, 29 Aug 2017 08:53:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC7F027FC0 for ; Tue, 29 Aug 2017 08:53:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751398AbdH2Iw6 (ORCPT ); Tue, 29 Aug 2017 04:52:58 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:46715 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1751409AbdH2Iw5 (ORCPT ); Tue, 29 Aug 2017 04:52:57 -0400 Received: from ig2.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by SHSQR01.spreadtrum.com with ESMTP id v7T8qHTM022591 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 29 Aug 2017 16:52:17 +0800 (CST) (envelope-from Orson.Zhai@spreadtrum.com) Received: from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.847.32; Tue, 29 Aug 2017 16:52:17 +0800 Received: from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Tue, 29 Aug 2017 16:52:16 +0800 From: Baolin Wang To: , , , CC: , , , , , Subject: [PATCH v2 1/2] dt-bindings: dma: Add Spreadtrum SC9860 DMA controller Date: Tue, 29 Aug 2017 16:47:16 +0800 Message-ID: X-Mailer: git-send-email 2.12.2 MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com v7T8qHTM022591 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the binding documentation for Spreadtrum SC9860 DMA controller device. Signed-off-by: Baolin Wang Acked-by: Rob Herring --- Changes since v1: - Fix typos. --- Documentation/devicetree/bindings/dma/sprd-dma.txt | 41 ++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/sprd-dma.txt diff --git a/Documentation/devicetree/bindings/dma/sprd-dma.txt b/Documentation/devicetree/bindings/dma/sprd-dma.txt new file mode 100644 index 0000000..7a10fea --- /dev/null +++ b/Documentation/devicetree/bindings/dma/sprd-dma.txt @@ -0,0 +1,41 @@ +* Spreadtrum DMA controller + +This binding follows the generic DMA bindings defined in dma.txt. + +Required properties: +- compatible: Should be "sprd,sc9860-dma". +- reg: Should contain DMA registers location and length. +- interrupts: Should contain one interrupt shared by all channel. +- #dma-cells: must be <1>. Used to represent the number of integer + cells in the dmas property of client device. +- #dma-channels : Number of DMA channels supported. Should be 32. +- clock-names: Should contain the clock of the DMA controller. +- clocks: Should contain a clock specifier for each entry in clock-names. + +Example: + +Controller: +apdma: dma-controller@20100000 { + compatible = "sprd,sc9860-dma"; + reg = <0x20100000 0x4000>; + interrupts = ; + #dma-cells = <1>; + #dma-channels = <32>; + clock-names = "enable"; + clocks = <&clk_ap_ahb_gates 5>; +}; + + +Client: +DMA clients connected to the Spreadtrum DMA controller must use the format +described in the dma.txt file, using a two-cell specifier for each channel. +The two cells in order are: +1. A phandle pointing to the DMA controller. +2. The channel id. + +spi0: spi@70a00000{ + ... + dma-names = "rx_chn", "tx_chn"; + dmas = <&apdma 11>, <&apdma 12>; + ... +};