[v4,0/4] x86/mce: Add supports for Zhaoxin MCA

Message

Tony W Wang-oc Sept. 18, 2019, 6:19 a.m. UTC

Zhaoxin newer CPUs support MCE, CMCI and LMCE that compatible with
Intel's "Machine-Check Architecture".

To enable the supports of Linux kernel to Zhaoxin's MCA, add
specific patches for Zhaoxin's MCE, CMCI and LMCE. patches about
Zhaoxin's CMCI, LMCE use 3 functions in mce/intel.c, so make these
functions non-static.

Some Zhaoxin's CPUs have MCA bank 8, that only has one error called SVAD
(System View Address Decoder) which be controlled by IA32_MC8.CTL.0.
If enabled, the prefetch on these CPUs will cause SVAD machine check
exception when virtual machine startup and cause system panic. Add a
quirk for these Zhaoxin CPUs MCA bank 8.

v3->v4:
 - remove redundant if-case test (patch 4/4)

v2->v3:
 - Make ifelse-case to switch-case (patch 1/4)
 - Simplify Zhaoxin CPU FMS checking (patch 1/4, 3/4)
 - Revert 1 unused function intel_ppin_init() (patch 2/4)
 - Rework mce_zhaoxin_feature_init() as static (patch 3/4)
 - Rework comment about Zhaoxin MCA SVAD and CMCI (patch 3/4)
 - Rework mce_zhaoxin_feature_clear() as static (patch 4/4)
 - Add comment and change coding style (patch 4/4)

v1->v2:
 - Fix redefinition of "mce_zhaoxin_feature_init" (patch 3/4)
 - Fix redefinition of "mce_zhaoxin_feature_clear" (patch 4/4)

Tony W Wang-oc (4):
  x86/mce: Add Zhaoxin MCE support
  x86/mce: Make 3 functions non-static
  x86/mce: Add Zhaoxin CMCI support
  x86/mce: Add Zhaoxin LMCE support

 arch/x86/kernel/cpu/mce/core.c     | 83 ++++++++++++++++++++++++++++++++------
 arch/x86/kernel/cpu/mce/intel.c    | 11 +++--
 arch/x86/kernel/cpu/mce/internal.h |  6 +++
 3 files changed, 84 insertions(+), 16 deletions(-)