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Fri, 6 Aug 2021 07:03:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT017.mail.protection.outlook.com (10.13.177.93) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4394.16 via Frontend Transport; Fri, 6 Aug 2021 07:03:49 +0000 Received: from SLES15.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Fri, 6 Aug 2021 02:03:47 -0500 From: Naveen Krishna Chatradhi To: , CC: , , Muralidhara M K Subject: [PATCH v2 0/3] x86/edac/amd64: Add support for noncpu nodes Date: Fri, 6 Aug 2021 13:13:47 +0530 Message-ID: <20210806074350.114614-1-nchatrad@amd.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210630152828.162659-1-nchatrad@amd.com> References: <20210630152828.162659-1-nchatrad@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 35699899-ca4d-4127-3140-08d958a85789 X-MS-TrafficTypeDiagnostic: DM5PR12MB1308: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Aug 2021 07:03:49.5564 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35699899-ca4d-4127-3140-08d958a85789 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1308 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Muralidhara M K On newer heterogeneous systems from AMD with GPU nodes connected via xGMI links to the CPUs, the GPU dies are interfaced with HBM2 memory. This patchset applies on top of the following series by Yazen Ghannam AMD MCA Address Translation Updates [https://patchwork.kernel.org/project/linux-edac/list/?series=505989] This patchset does the following 1. Add support for northbridges on Aldebaran * x86/amd_nb: Add support for northbridges on Aldebaran 2. Modifies the amd64_edac module to a. Handle the UMCs on the noncpu nodes, * EDAC/mce_amd: extract node id from InstanceHi in IPID b. Enumerate HBM memory and add address translation * EDAC/amd64: Enumerate memory on noncpu nodes Muralidhara M K (1): x86/amd_nb: Add support for northbridges on Aldebaran Naveen Krishna Chatradhi (2): EDAC/mce_amd: Extract node id from InstanceHi in IPID EDAC/amd64: Enumerate memory on noncpu nodes arch/x86/include/asm/amd_nb.h | 10 ++ arch/x86/kernel/amd_nb.c | 63 ++++++++++- drivers/edac/amd64_edac.c | 202 +++++++++++++++++++++++++++++----- drivers/edac/amd64_edac.h | 27 +++++ drivers/edac/mce_amd.c | 19 +++- include/linux/pci_ids.h | 1 + 6 files changed, 288 insertions(+), 34 deletions(-)