From patchwork Fri May 6 13:32:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiju Jose X-Patchwork-Id: 12841167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5AD1C433F5 for ; Fri, 6 May 2022 13:42:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230141AbiEFNpl (ORCPT ); Fri, 6 May 2022 09:45:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1391462AbiEFNpd (ORCPT ); Fri, 6 May 2022 09:45:33 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC66348317 for ; Fri, 6 May 2022 06:41:43 -0700 (PDT) Received: from fraeml735-chm.china.huawei.com (unknown [172.18.147.207]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Kvs8j2zPdz67KsQ; Fri, 6 May 2022 21:38:29 +0800 (CST) Received: from lhreml715-chm.china.huawei.com (10.201.108.66) by fraeml735-chm.china.huawei.com (10.206.15.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 15:41:41 +0200 Received: from P_UKIT01-A7bmah.china.huawei.com (10.47.73.106) by lhreml715-chm.china.huawei.com (10.201.108.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Fri, 6 May 2022 14:41:40 +0100 From: To: , CC: , , , , , , , Subject: [PATCH 00/10] rasdaemon: Add cpu fault isolation support and improvements to the HiSilicon vendor specific code Date: Fri, 6 May 2022 14:32:57 +0100 Message-ID: <20220506133307.1799-1-shiju.jose@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.47.73.106] X-ClientProxiedBy: lhreml744-chm.china.huawei.com (10.201.108.194) To lhreml715-chm.china.huawei.com (10.201.108.66) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Shiju Jose 1. Support cpu fault isolation for the corrected and recoverable errors. 2. Improvements to the HiSilicon vendor specific code. 3. Bug fix for a memory out-of-bounds issue. Shengwei Luo (2): rasdaemon: Support cpu fault isolation for corrected errors rasdaemon: Support cpu fault isolation for recoverable errors Shiju Jose (8): rasdaemon: Modify recording Hisilicon common error data rasdaemon: ras-mc-ctl: Modify error statistics for HiSilicon KunPeng9xx common errors rasdaemon: ras-mc-ctl: Reformat error info of the HiSilicon Kunpeng920 rasdaemon: ras-mc-ctl: Add printing usage if necessary parameters are not passed for the vendor-error options rasdaemon: ras-mc-ctl: Add support to display the HiSilicon vendor errors for a specified module rasdaemon: ras-mc-ctl: Relocate reading and display Kunpeng920 errors to under Kunpeng9xx rasdaemon: ras-mc-ctl: Updated HiSilicon platform name rasdaemon: Fix for a memory out-of-bounds issue and optimized code to remove duplicate function. Makefile.am | 6 +- configure.ac | 11 + misc/rasdaemon.env | 17 ++ non-standard-hisi_hip08.c | 6 +- non-standard-hisilicon.c | 128 +++++++++--- queue.c | 119 +++++++++++ queue.h | 39 ++++ ras-arm-handler.c | 113 +++++++++++ ras-arm-handler.h | 18 ++ ras-cpu-isolation.c | 405 +++++++++++++++++++++++++++++++++++++ ras-cpu-isolation.h | 70 +++++++ ras-events.c | 9 +- ras-non-standard-handler.c | 16 +- util/ras-mc-ctl.in | 196 ++++++++++-------- 14 files changed, 1028 insertions(+), 125 deletions(-) create mode 100644 queue.c create mode 100644 queue.h create mode 100644 ras-cpu-isolation.c create mode 100644 ras-cpu-isolation.h