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Sun, 14 May 2023 10:24:36 -0700 Received: from xhdshubhraj40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Sun, 14 May 2023 12:24:33 -0500 From: Shubhrajyoti Datta To: CC: , , , , , , , , , , Subject: [RESEND PATCH v6 0/2] edac: xilinx: Added EDAC support for Xilinx DDR controller Date: Sun, 14 May 2023 22:54:30 +0530 Message-ID: <20230514172432.12505-1-shubhrajyoti.datta@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT012:EE_|CY8PR12MB7435:EE_ X-MS-Office365-Filtering-Correlation-Id: 314c718c-216b-4a35-ce72-08db54a01a05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lpiVkDPDH3WkG+Eo1Rm1krHCKsIz7FD01LFuyaLgsaNie6RbF/HkIb/eKcQUyEkcdmo/nKd99wZK5psz8KeNpR9Fg4dmwlqhtZqNZna1qgD5c5xhWn0Zdnp/Nk4NsmwgCNROdzx2arxwyOI4NjP/s2seMBzVkLJY9JRLQizATdxABoApe07vJRZjyLr6tEpnkt7fdQoWzmvcn/1KGbpvX10+1v2wq6JuQ/ob9t4UbFVwDHwB7KrAgZ5k2zMrT/MtwOvyX/zOzv3o2g1zt/n4VkOcQ20VGvIYTK966EAd0rrF7yO23uX5hUEISaZUxkkpJaRIqxM7oD17shRx1Nsy3vtiFbiUVIG1qk+/x+1Bc1pQkjen7CIFpeQpua5SQIzsg5gIJ4S559BqLixwLSRagwET1Z0WYMd9FPMmjOBZa0Gc7Q07BOR6n0dLTpDXuMZOwJ2ELBErPIVLftn8JN8JWCbpbHdYLFINK3Cpmkr1NnM5plf1xMcCqoEtuinOxhYr8xJy4uPMvkdvtnT7OIvenjp/w4TQynBq4GoUs4kNeKmFu65a47bUfmkjmy1m1ih2iuFm5Rv8V1+7+U+OLjkVHYQEd5/5W9EV08KBYg18+AKiFrvE6TCVx09jZv5EsDjjZO89ieDVPAAciAV2+3Y4klSCbtwd6Jj96lkyXT3TgKc96Y4lH/33AanFuwO8r+s5xw5b9wmBU6fYnvenS9LWMFIL+EnVBCUQkGyuuT+gZy+GjxKotnkRnbwbbnQHYo5BsncnHxcc4QNRwzvzPFT6kA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(136003)(346002)(396003)(39860400002)(451199021)(46966006)(40470700004)(36840700001)(47076005)(36860700001)(336012)(426003)(83380400001)(70206006)(70586007)(2616005)(26005)(1076003)(40480700001)(478600001)(54906003)(186003)(7416002)(5660300002)(44832011)(86362001)(40460700003)(8676002)(8936002)(2906002)(36756003)(41300700001)(4326008)(6916009)(82740400003)(316002)(81166007)(356005)(82310400005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2023 17:24:41.0520 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 314c718c-216b-4a35-ce72-08db54a01a05 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7435 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/4X memory interfaces. It has four programmable NoC interface ports and is designed to handle multiple streams of traffic. Optional external interface reliability include ECC error detection/correction and command address parity. Adding edac support for DDR Memory controller. Changes in v6: Fix the warn. Changes in v5: Update subject Changes in v4: Update the subject rename the driver file. fix the debugfs file. fix unneeded capitalisation. refactor code Changes in v3: Rebased and resent. Changes in v2: remove edac from compatible Update the description update the ddrmc_base and ddrmc_noc_base names Update a missed out file remove edac from compatible name rename ddrmc_noc_base and ddrmc_base Shubhrajyoti Datta (2): dt-bindings: edac: Add bindings for Xilinx Versal EDAC for DDRMC EDAC/versal: Add a Xilinx Versal memory controller driver .../xlnx,versal-ddrmc-edac.yaml | 57 + MAINTAINERS | 7 + drivers/edac/Kconfig | 11 + drivers/edac/Makefile | 1 + drivers/edac/versal_edac.c | 1078 +++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 10 + 6 files changed, 1164 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml create mode 100644 drivers/edac/versal_edac.c