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Mon, 15 May 2023 11:35:57 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT027.mail.protection.outlook.com (10.13.172.205) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6411.15 via Frontend Transport; Mon, 15 May 2023 11:35:56 +0000 Received: from amd.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 15 May 2023 06:35:54 -0500 From: Muralidhara M K To: , CC: , , , , , Muralidhara M K Subject: [PATCH 0/5] AMD64 EDAC GPU Updates Date: Mon, 15 May 2023 11:35:32 +0000 Message-ID: <20230515113537.1052146-1-muralimk@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT027:EE_|CH2PR12MB4151:EE_ X-MS-Office365-Filtering-Correlation-Id: fd3b6dbc-63ea-4ae9-aff1-08db55388cb2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2023 11:35:56.9326 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fd3b6dbc-63ea-4ae9-aff1-08db55388cb2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT027.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4151 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Muralidhara M K This set adds GPU support to AMD64 EDAC starting with the MI200 (Aldebaran) series. The AMD Instinct™ MI200 series accelerators are the data center GPUs. Patch 1: Adds PCI IDs without changing the existing AMD NB code. Patch 2: Recognizes the new UMC SMCA bank type in the decoder module as just another UMC bank. Decode details are done in the AMD64 EDAC module. Patch 3: Adds code documentation on how the GPU memory is laid out in EDAC. Patch 4: Adds the bulk of the GPU-specific code. Patch 5: Handle differences in "AMD Node" enumeration for GPU dies. Muralidhara M K (2): EDAC/amd64: Document heterogeneous system enumeration EDAC/amd64: Add support for AMD heterogeneous Family 19h Model 30h-3Fh Yazen Ghannam (3): x86/amd_nb: Add MI200 PCI IDs x86/MCE/AMD, EDAC/mce_amd: Decode UMC_V2 ECC errors EDAC/amd64: Cache and use GPU node map Documentation/driver-api/edac.rst | 120 ++++++++++ arch/x86/kernel/amd_nb.c | 5 + arch/x86/kernel/cpu/mce/amd.c | 6 +- drivers/edac/amd64_edac.c | 386 +++++++++++++++++++++++++++--- drivers/edac/amd64_edac.h | 1 + drivers/edac/mce_amd.c | 3 +- include/linux/pci_ids.h | 1 + 7 files changed, 488 insertions(+), 34 deletions(-)