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Tue, 13 Jun 2023 14:12:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EDD2.mail.protection.outlook.com (10.167.241.206) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6500.23 via Frontend Transport; Tue, 13 Jun 2023 14:12:37 +0000 Received: from quartz-7b1chost.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Tue, 13 Jun 2023 09:12:15 -0500 From: Yazen Ghannam To: CC: , , , , , , , , , , Yazen Ghannam Subject: [PATCH 0/3] Properly check for usable addresses on AMD Date: Tue, 13 Jun 2023 09:11:39 -0500 Message-ID: <20230613141142.36801-1-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD2:EE_|DS7PR12MB6264:EE_ X-MS-Office365-Filtering-Correlation-Id: 95938367-6fe9-4cf0-5d2c-08db6c183ded X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jun 2023 14:12:37.5944 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 95938367-6fe9-4cf0-5d2c-08db6c183ded X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6264 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Hi all, This set adds proper checks for usable addresses on AMD systems. Patch 1 creates helper functions for memory error checks that will be used in the second patch. Patch 2 adds the proper usable address checks. Patch 3 restructures the current usable address function to call out to vendor-specific helpers. I don't think these need 'stable' backports, since there isn't an urgent issue to be fixed. But I can include 'stable' if there's interest. Thanks, Yazen Yazen Ghannam (3): x86/MCE/AMD: Split amd_mce_is_memory_error() x86/mce: Define amd_mce_usable_address() x86/mce: Fixup mce_usable_address() arch/x86/include/asm/mce.h | 2 +- arch/x86/kernel/cpu/mce/amd.c | 68 +++++++++++++++++++++++++++--- arch/x86/kernel/cpu/mce/core.c | 32 +++++--------- arch/x86/kernel/cpu/mce/intel.c | 20 +++++++++ arch/x86/kernel/cpu/mce/internal.h | 4 ++ 5 files changed, 99 insertions(+), 27 deletions(-)