From patchwork Mon Sep 23 07:33:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony W Wang-oc X-Patchwork-Id: 13809343 Received: from mx1.zhaoxin.com (MX1.ZHAOXIN.COM [210.0.225.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 535D21D52B for ; Mon, 23 Sep 2024 07:37:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.0.225.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727077048; cv=none; b=PlyNap/YZFI2n/Lg9tLD/sGScheewN5i+nZW2y6MAZo9D/hb9mPsHflFmbXv+pKH255DwE5bfUruDfsYJK02ykxQj2EW/ClrXfpJmXXRu3fnSt6byclkMfqWl8JMGZoJD7QShdSiSwWD/36qEcIrRVsfnXHTrR3gLcJmnUAEhJk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727077048; c=relaxed/simple; bh=dPvSQqvqu8v8ffvNZW4QajwsVPbXcvLCE3MDFU7L8v4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=X3Cru0ghTiGUw9Z0i7pSRo6zJFcFvMg/IrTOMOaWjUXs1glOcuJAZLIG6bCbHqmm/7R7boThFR0Ipi+EcX5YjhXLRmMnHN6fWxq7/QjrJ6Kb1MrCTPvaTmqedWmj9IquHGdoqhXWRFTEE51bKq7TPyeWDJZ98ScJCvVfvolR/Pc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com; spf=pass smtp.mailfrom=zhaoxin.com; arc=none smtp.client-ip=210.0.225.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=zhaoxin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zhaoxin.com X-ASG-Debug-ID: 1727077030-086e236b0800f40001-QCVQLf Received: from ZXSHMBX2.zhaoxin.com (ZXSHMBX2.zhaoxin.com [10.28.252.164]) by mx1.zhaoxin.com with ESMTP id 9sMIDwAWllpDgD8h (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Mon, 23 Sep 2024 15:37:10 +0800 (CST) X-Barracuda-Envelope-From: TonyWWang-oc@zhaoxin.com X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.164 Received: from ZXSHMBX2.zhaoxin.com (10.28.252.164) by ZXSHMBX2.zhaoxin.com (10.28.252.164) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Mon, 23 Sep 2024 15:37:09 +0800 Received: from ZXSHMBX2.zhaoxin.com ([fe80::d4e0:880a:d21:684d]) by ZXSHMBX2.zhaoxin.com ([fe80::d4e0:880a:d21:684d%4]) with mapi id 15.01.2507.039; Mon, 23 Sep 2024 15:37:09 +0800 X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.164 Received: from localhost.localdomain (10.32.65.165) by ZXBJMBX03.zhaoxin.com (10.29.252.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 23 Sep 2024 15:33:07 +0800 From: Tony W Wang-oc To: , , , , , , , , CC: , , , Lyle Li Subject: [PATCH v4 0/4] x86/mce: Add Zhaoxin MCE support and remove Date: Mon, 23 Sep 2024 15:33:07 +0800 X-ASG-Orig-Subj: [PATCH v4 0/4] x86/mce: Add Zhaoxin MCE support and remove Message-ID: <20240923073311.4290-1-TonyWWang-oc@zhaoxin.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240918055436.15551-1-TonyWWang-oc@zhaoxin.com> References: <20240918055436.15551-1-TonyWWang-oc@zhaoxin.com> Precedence: bulk X-Mailing-List: linux-edac@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To ZXBJMBX03.zhaoxin.com (10.29.252.7) X-Moderation-Data: 9/23/2024 3:37:08 PM X-Barracuda-Connect: ZXSHMBX2.zhaoxin.com[10.28.252.164] X-Barracuda-Start-Time: 1727077030 X-Barracuda-Encrypted: ECDHE-RSA-AES128-GCM-SHA256 X-Barracuda-URL: https://10.28.252.35:4443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at zhaoxin.com X-Barracuda-Scan-Msg-Size: 1895 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.0000 1.0000 -2.0210 X-Barracuda-Spam-Score: -2.02 X-Barracuda-Spam-Status: No, SCORE=-2.02 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=9.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.130843 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- From: Lyle Li Zhaoxin consists of two vendors, X86_VENDOR_ZHAOXIN and X86_VENDOR_CENTAUR, so add the centaur vendor to support Zhaoxin MCA in mce/core.c and mce/intel.c. Since all major vendors do not disable MCA_CTL after initialization, functions that disable error reporting should be removed in mce/core.c. For the sake of code standardization, add zhaoxin.c to override the Zhaoxin MCA code. Zhaoxin CPUs support CMCI compatible with Intel, because Zhaoxin's UCR error is not reported through CMCI, and in order to be compatible with intel's CMCI code, so add Zhaoxin CMCI storm toggle to support the new CMCI storm switching in mce/intel.c, mce/zhaoxin.c, mce/threshold.c, and mce/internal.h. v3->v4: - Remove functions that disable error reporting (patch 2/4) v2->v3: - Consolidate the MCA code for Zhaoxin and Centaur regarding the broadcast MCE configuration (patch 3/4) v1->v2: - Fix multiple definition of "mce_zhaoxin_feature_init" (patch 3/4) - Fix multiple definition of "mce_zhaoxin_feature_clear" (patch 3/4) - Fix multiple definition of "mce_zhaoxin_handle_storm" (patch 4/4) Lyle Li (4): x86/mce: Add centaur vendor to support Zhaoxin MCA x86/mce: Remove functions that disable error reporting x86/mce: Add zhaoxin.c to support Zhaoxin MCA x86/mce: Add CMCI storm switching support for Zhaoxin arch/x86/Kconfig | 8 ++ arch/x86/kernel/cpu/mce/Makefile | 2 +- arch/x86/kernel/cpu/mce/core.c | 116 ++-------------------------- arch/x86/kernel/cpu/mce/intel.c | 8 +- arch/x86/kernel/cpu/mce/internal.h | 14 +++- arch/x86/kernel/cpu/mce/threshold.c | 4 + arch/x86/kernel/cpu/mce/zhaoxin.c | 83 ++++++++++++++++++++ 7 files changed, 120 insertions(+), 115 deletions(-) create mode 100644 arch/x86/kernel/cpu/mce/zhaoxin.c