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Fri, 1 Nov 2019 14:48:14 +0000 From: "Ghannam, Yazen" To: "linux-edac@vger.kernel.org" CC: "mchehab+samsung@kernel.org" , "Namburu, Chandu-babu" Subject: [PATCH 1/2] rasdaemon: rename CPU_NAPLES cputype Thread-Topic: [PATCH 1/2] rasdaemon: rename CPU_NAPLES cputype Thread-Index: AQHVkMNjBiL1UOYkaEiuuemWO+sISA== Date: Fri, 1 Nov 2019 14:48:13 +0000 Message-ID: <20191101144800.20803-2-Yazen.Ghannam@amd.com> References: <20191101144800.20803-1-Yazen.Ghannam@amd.com> In-Reply-To: <20191101144800.20803-1-Yazen.Ghannam@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN6PR0102CA0017.prod.exchangelabs.com (2603:10b6:805:1::30) To BYAPR12MB2630.namprd12.prod.outlook.com (2603:10b6:a03:67::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Yazen.Ghannam@amd.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [165.204.78.2] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 4b80af6f-ca23-4514-f181-08d75eda85c5 x-ms-traffictypediagnostic: BYAPR12MB3525: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; 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[ Yazen: change family check to feature check, and change CPU name. ] Signed-off-by: Brian Woods Signed-off-by: Yazen Ghannam Cc: Chandu-babu Namburu --- ras-mce-handler.c | 10 ++++++---- ras-mce-handler.h | 2 +- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/ras-mce-handler.c b/ras-mce-handler.c index fd3ef3b..016acae 100644 --- a/ras-mce-handler.c +++ b/ras-mce-handler.c @@ -55,7 +55,7 @@ static char *cputype_name[] = { [CPU_KNIGHTS_LANDING] = "Knights Landing", [CPU_KNIGHTS_MILL] = "Knights Mill", [CPU_SKYLAKE_XEON] = "Skylake server", - [CPU_NAPLES] = "AMD Family 17h Zen1", + [CPU_AMD_SMCA] = "AMD Scalable MCA", [CPU_DHYANA] = "Hygon Family 18h Moksha" }; @@ -192,8 +192,10 @@ static int detect_cpu(struct ras_events *ras) if (!strcmp(mce->vendor, "AuthenticAMD")) { if (mce->family == 15) mce->cputype = CPU_K8; - if (mce->family == 23) - mce->cputype = CPU_NAPLES; + if (strstr(mce->processor_flags, "smca")) { + mce->cputype = CPU_AMD_SMCA; + goto ret; + } if (mce->family > 23) { log(ALL, LOG_INFO, "Can't parse MCE for this AMD CPU yet %d\n", @@ -441,7 +443,7 @@ int ras_mce_event_handler(struct trace_seq *s, case CPU_K8: rc = parse_amd_k8_event(ras, &e); break; - case CPU_NAPLES: + case CPU_AMD_SMCA: case CPU_DHYANA: rc = parse_amd_smca_event(ras, &e); break; diff --git a/ras-mce-handler.h b/ras-mce-handler.h index 94395eb..1ef7ef2 100644 --- a/ras-mce-handler.h +++ b/ras-mce-handler.h @@ -50,7 +50,7 @@ enum cputype { CPU_KNIGHTS_LANDING, CPU_KNIGHTS_MILL, CPU_SKYLAKE_XEON, - CPU_NAPLES, + CPU_AMD_SMCA, CPU_DHYANA, };