diff mbox series

[v3,05/19] x86/mce: WARN once if IA32_FEATURE_CONTROL MSR is left unlocked

Message ID 20191119031240.7779-6-sean.j.christopherson@intel.com (mailing list archive)
State New, archived
Headers show
Series x86/cpu: Clean up handling of VMX features | expand

Commit Message

Sean Christopherson Nov. 19, 2019, 3:12 a.m. UTC
WARN if the IA32_FEATURE_CONTROL MSR is somehow left unlocked now that
CPU initialization unconditionally locks the MSR.

Reviewed-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 arch/x86/kernel/cpu/mce/intel.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

Comments

Jarkko Sakkinen Nov. 21, 2019, 10:45 a.m. UTC | #1
On Mon, Nov 18, 2019 at 07:12:26PM -0800, Sean Christopherson wrote:
> WARN if the IA32_FEATURE_CONTROL MSR is somehow left unlocked now that
> CPU initialization unconditionally locks the MSR.
> 
> Reviewed-by: Borislav Petkov <bp@suse.de>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> ---
>  arch/x86/kernel/cpu/mce/intel.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
> index 3e5b29acd301..5abc55a67fce 100644
> --- a/arch/x86/kernel/cpu/mce/intel.c
> +++ b/arch/x86/kernel/cpu/mce/intel.c
> @@ -119,11 +119,10 @@ static bool lmce_supported(void)
>  	 * generate a #GP fault.
>  	 */
>  	rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp);
> -	if ((tmp & (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED)) ==
> -		   (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED))
> -		return true;

I'd add a prepending comment:

/*
 * FEAT_CTL_LOCKED should have been always set either by
 * BIOS before handover to the kernel or init_feature_control_msr().
 */

> +	if (WARN_ON_ONCE(!(tmp & FEAT_CTL_LOCKED)))
> +		return false;
>  
> -	return false;
> +	return tmp & FEAT_CTL_LMCE_ENABLED;
>  }
>  
>  bool mce_intel_cmci_poll(void)
> -- 
> 2.24.0
> 

/Jarkko
diff mbox series

Patch

diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
index 3e5b29acd301..5abc55a67fce 100644
--- a/arch/x86/kernel/cpu/mce/intel.c
+++ b/arch/x86/kernel/cpu/mce/intel.c
@@ -119,11 +119,10 @@  static bool lmce_supported(void)
 	 * generate a #GP fault.
 	 */
 	rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp);
-	if ((tmp & (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED)) ==
-		   (FEAT_CTL_LOCKED | FEAT_CTL_LMCE_ENABLED))
-		return true;
+	if (WARN_ON_ONCE(!(tmp & FEAT_CTL_LOCKED)))
+		return false;
 
-	return false;
+	return tmp & FEAT_CTL_LMCE_ENABLED;
 }
 
 bool mce_intel_cmci_poll(void)