diff mbox series

trace: ras: print the raw data of arm processor error info

Message ID 20191214121109.8349-1-xiexiuqi@huawei.com (mailing list archive)
State New, archived
Headers show
Series trace: ras: print the raw data of arm processor error info | expand

Commit Message

Xie XiuQi Dec. 14, 2019, 12:11 p.m. UTC
User space tools such as rasdaemon need the complete error
information from trace event. So, we print the raw data of
error information in arm_event.

In the past, I try to parse them in trace event, but it's
hard to deal the dynamic error item. And in commit 301f55b1a917
("efi: Parse ARM error information value"), the error information
already been parsed to syslog.

So, just print the raw data in trace event for simpler.

Cc: Borislav Petkov <bp@suse.de>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Tyler Baicar <tbaicar@codeaurora.org>
Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com>
---
 include/ras/ras_event.h | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

Comments

Hermann Ruckerbauer Dec. 16, 2019, 10:17 a.m. UTC | #1
Hello,

not sure if this is a bit off topic, but I hope to get some answers ...

I looked to the Apollo lake pnd2_edac.c  code, my understandig is, that
this is the same as for denverton.
but in our BIOS is see one point in the memory settings called
"Performance profile"
Selectable is "17_9_13_18", "17_19_6_18" or "17_19_6_7"
This setting seems to be realated to the DMAP table... but for APL there
are just the "standard" configs visible.

Does anybody know if these DMAP settings are different in Denverton vs.
Apollo lake, and how these are decoded in the PND2_edac.c cource code ?
at least I have not found any hint on this performance setting in the
code..

Thanks a lot
Borislav Petkov Jan. 9, 2020, 11:46 a.m. UTC | #2
On Sat, Dec 14, 2019 at 08:11:09PM +0800, Xie XiuQi wrote:
> User space tools such as rasdaemon need the complete error
> information from trace event. So, we print the raw data of
> error information in arm_event.
> 
> In the past, I try to parse them in trace event, but it's
> hard to deal the dynamic error item. And in commit 301f55b1a917
> ("efi: Parse ARM error information value"), the error information
> already been parsed to syslog.
> 
> So, just print the raw data in trace event for simpler.
> 
> Cc: Borislav Petkov <bp@suse.de>
> Cc: Steven Rostedt <rostedt@goodmis.org>
> Cc: Tyler Baicar <tbaicar@codeaurora.org>
> Signed-off-by: Xie XiuQi <xiexiuqi@huawei.com>
> ---
>  include/ras/ras_event.h | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
> index 36c5c5e38c1d..2023ba9206b3 100644
> --- a/include/ras/ras_event.h
> +++ b/include/ras/ras_event.h
> @@ -180,6 +180,9 @@ TRACE_EVENT(arm_event,
>  		__field(u32, running_state)
>  		__field(u32, psci_state)
>  		__field(u8, affinity)
> +		__field(u32, count)
> +		__field(u32, len)
> +		__dynamic_array(u8, err_info, proc->err_info_num * sizeof(struct cper_arm_err_info))
>  	),
>  
>  	TP_fast_assign(
> @@ -199,12 +202,18 @@ TRACE_EVENT(arm_event,
>  			__entry->running_state = ~0;
>  			__entry->psci_state = ~0;
>  		}
> +
> +		__entry->count = proc->err_info_num;
> +		__entry->len = __entry->count * sizeof(struct cper_arm_err_info);
> +		memcpy(__get_dynamic_array(err_info), proc + 1, __entry->len);
>  	),
>  
>  	TP_printk("affinity level: %d; MPIDR: %016llx; MIDR: %016llx; "
> -		  "running state: %d; PSCI state: %d",
> +		  "running state: %d; PSCI state: %d; error count: %d; "
> +		  "raw data: %s",
>  		  __entry->affinity, __entry->mpidr, __entry->midr,
> -		  __entry->running_state, __entry->psci_state)
> +		  __entry->running_state, __entry->psci_state, __entry->count,
> +		  __print_hex(__get_dynamic_array(err_info), __entry->len))
>  );
>  
>  /*
> -- 

That's for ARM folks to decide whether they wanna shuffle raw error
records into userspace like that. CCed.
Xie XiuQi Jan. 13, 2020, 2:10 p.m. UTC | #3
Hi James,

What do you think of this patch?

On 2020/1/9 19:46, Borislav Petkov wrote:
>>  );
>>  
>>  /*
>> -- 
> That's for ARM folks to decide whether they wanna shuffle raw error
> records into userspace like that. CCed.
James Morse Feb. 26, 2020, 3:14 p.m. UTC | #4
Hi Xie,

On 13/01/2020 14:10, Xie XiuQi wrote:
> What do you think of this patch?
> 
> On 2020/1/9 19:46, Borislav Petkov wrote:
>>>  );
>>>  
>>>  /*

What patch?!

(digs in the headers)
https://lore.kernel.org/linux-edac/20191214121109.8349-1-xiexiuqi@huawei.com/

>>> -- 
>> That's for ARM folks to decide whether they wanna shuffle raw error
>> records into userspace like that. CCed.

Hmm, this dumps more of 'CPER_SEC_PROC_ARM' to user-space. But not all of it ... (ugh,
this is the thing with three variable length fields in it!) I would like to be able to
parse these in the kernel eventually, but that doesn't matter right now.

I agree privileged user-space should be able to collect all the CPER for some tool to
analyse it. (what else would we do with 'vendor specific error info'?). I'm not totally
convinced tracepoints are the right thing for big blobs of data like this, but its what
we're using today.


I'll show my ignorance about trace points:

How does rasdaemon react to you expanding the trace point like this? I recall they are
self-describing, if user-space doesn't hard code the layout...

You export what may be kernel pointers with the virtual fault address. Is there any way an
unprivileged user can get hold of these?
(its somewhat pointless as user-space can't know what that pointer means)



Thanks,

James
diff mbox series

Patch

diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
index 36c5c5e38c1d..2023ba9206b3 100644
--- a/include/ras/ras_event.h
+++ b/include/ras/ras_event.h
@@ -180,6 +180,9 @@  TRACE_EVENT(arm_event,
 		__field(u32, running_state)
 		__field(u32, psci_state)
 		__field(u8, affinity)
+		__field(u32, count)
+		__field(u32, len)
+		__dynamic_array(u8, err_info, proc->err_info_num * sizeof(struct cper_arm_err_info))
 	),
 
 	TP_fast_assign(
@@ -199,12 +202,18 @@  TRACE_EVENT(arm_event,
 			__entry->running_state = ~0;
 			__entry->psci_state = ~0;
 		}
+
+		__entry->count = proc->err_info_num;
+		__entry->len = __entry->count * sizeof(struct cper_arm_err_info);
+		memcpy(__get_dynamic_array(err_info), proc + 1, __entry->len);
 	),
 
 	TP_printk("affinity level: %d; MPIDR: %016llx; MIDR: %016llx; "
-		  "running state: %d; PSCI state: %d",
+		  "running state: %d; PSCI state: %d; error count: %d; "
+		  "raw data: %s",
 		  __entry->affinity, __entry->mpidr, __entry->midr,
-		  __entry->running_state, __entry->psci_state)
+		  __entry->running_state, __entry->psci_state, __entry->count,
+		  __print_hex(__get_dynamic_array(err_info), __entry->len))
 );
 
 /*