| Message ID | 20200103150722.20313-6-jschoenh@amazon.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86/mce: Various fixes and cleanups for MCE handling | expand |
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index d48deb127071..d8fe5b048ee7 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -1970,7 +1970,8 @@ int __init mcheck_init(void) { mcheck_intel_therm_init(); mce_register_decode_chain_internal(&first_nb); - mce_register_decode_chain_internal(&mce_uc_nb); + if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) + mce_register_decode_chain_internal(&mce_uc_nb); mce_register_decode_chain_internal(&mce_default_nb); mcheck_vendor_init_severity();
Per Yazen Ghannam we should not use the UC notifier for the time being on AMD. Reported-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de> --- New in v2. This is due to a remark from Yazen on v1, that we shouldn't be handling neither SRAO nor Deferred errors in that handler. An alternative implementation would do the architecture "if" directly within uc_decode_notifier(), in which case we could decide to not apply patch 4. --- arch/x86/kernel/cpu/mce/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)