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[24.155.109.49]) by smtp.googlemail.com with ESMTPSA id y25sm1545755oto.27.2020.02.18.09.13.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Feb 2020 09:13:33 -0800 (PST) From: Rob Herring To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org, Andre Przywara , Robert Richter , Jon Loeliger , Alexander Graf , Matthias Brugger , Mark Langsdorf Cc: Alex Williamson , Borislav Petkov , Cornelia Huck , Daniel Lezcano , "David S. Miller" , devicetree@vger.kernel.org, Eric Auger , iommu@lists.linux-foundation.org, James Morse , Jens Axboe , Joerg Roedel , kvm@vger.kernel.org, linux-clk@vger.kernel.org, linux-edac@vger.kernel.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, Mauro Carvalho Chehab , netdev@vger.kernel.org, "Rafael J. Wysocki" , Robin Murphy , Stephen Boyd , Tony Luck , Viresh Kumar , Will Deacon Subject: [RFC PATCH 06/11] iommu: arm-smmu: Remove Calxeda secure mode quirk Date: Tue, 18 Feb 2020 11:13:16 -0600 Message-Id: <20200218171321.30990-7-robh@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200218171321.30990-1-robh@kernel.org> References: <20200218171321.30990-1-robh@kernel.org> MIME-Version: 1.0 Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Cc: Will Deacon Cc: Robin Murphy Cc: Joerg Roedel Cc: iommu@lists.linux-foundation.org Signed-off-by: Rob Herring --- Do not apply yet. drivers/iommu/arm-smmu-impl.c | 43 ----------------------------------- 1 file changed, 43 deletions(-) -- 2.20.1 diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c index 74d97a886e93..a3be8712d27f 100644 --- a/drivers/iommu/arm-smmu-impl.c +++ b/drivers/iommu/arm-smmu-impl.c @@ -9,45 +9,6 @@ #include "arm-smmu.h" - -static int arm_smmu_gr0_ns(int offset) -{ - switch(offset) { - case ARM_SMMU_GR0_sCR0: - case ARM_SMMU_GR0_sACR: - case ARM_SMMU_GR0_sGFSR: - case ARM_SMMU_GR0_sGFSYNR0: - case ARM_SMMU_GR0_sGFSYNR1: - case ARM_SMMU_GR0_sGFSYNR2: - return offset + 0x400; - default: - return offset; - } -} - -static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, - int offset) -{ - if (page == ARM_SMMU_GR0) - offset = arm_smmu_gr0_ns(offset); - return readl_relaxed(arm_smmu_page(smmu, page) + offset); -} - -static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, - int offset, u32 val) -{ - if (page == ARM_SMMU_GR0) - offset = arm_smmu_gr0_ns(offset); - writel_relaxed(val, arm_smmu_page(smmu, page) + offset); -} - -/* Since we don't care for sGFAR, we can do without 64-bit accessors */ -static const struct arm_smmu_impl calxeda_impl = { - .read_reg = arm_smmu_read_ns, - .write_reg = arm_smmu_write_ns, -}; - - struct cavium_smmu { struct arm_smmu_device smmu; u32 id_base; @@ -166,10 +127,6 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) break; } - if (of_property_read_bool(smmu->dev->of_node, - "calxeda,smmu-secure-config-access")) - smmu->impl = &calxeda_impl; - if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-500")) return qcom_smmu_impl_init(smmu);