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X-Microsoft-Antispam-Message-Info: qKH/0zBfsjJfOOmnGJlRaoJVVf5UJZK2TqebEHzA8u7bEpgInQoMM4aBliEN7nTMerH8WKfYv//V4PYJk28zjOvWsiSlY7k0Araig2L7L7+Y8ti/yXxD9YRCcdVSDiPqByKC7WoFu2FyuyfFyfpXzsZdozEaT7AWwvxeqSF8RNDur++AGf7Mzwr4+GBeXGICjK/czbSwKrUQVHo5kIwxJyK9ElfHCM8r/TkgSs3jXqoeLjOc0WeXwUH9dUnutO1yJ5Q/x9RQgDRD09Dxfa5OH/U1N6EwNYqxcNPfE/llDVdH4UW3OFMcyKNxlwbDjSpL00olDi7LnXk3q17OCv51guktRP9eufqLCmFhUdSOAPdARg0WdZyehcSDVY0ja5ZMlAprhIYBbJWfn3DGy6/N9EteCtN9RICgpqq72EL2BI8PhzomzKkJYYin3jVbSoLT X-MS-Exchange-AntiSpam-MessageData: X9KcYpRLXvmnFl0f80zGo5wbwhptx7C0Y7ByufgsveoYDyfp7CKguPSszflKSWfyouOTMmeeH6kvEQz4rvqzxSxhEyWK49sVaP3hVj+RiM/ETZm8+fo0n2rY9I5YLGZqfQvxm7coDYq/aG2p31fAiA== X-MS-Exchange-CrossTenant-Network-Message-Id: 50b644b1-5fe1-4ecc-1d7a-08d7c1e0f9b8 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Mar 2020 15:13:50.4941 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: TTvdJcbIU05528O/kP7ODXMRMol3zcjb9AuwOQq/kZh64cM8OsGnevo/vRiLjH2iPoPh6OoK6l409kPJrvBUdQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB2400 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-03-06_04:2020-03-06,2020-03-06 signatures=0 Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org The functions are too long, carve out code that handles MC devices into the new functions ghes_mc_create(), ghes_mc_add_or_free() and ghes_mc_free(). Apart from better code readability the functions can be reused and the implementation of the error paths becomes easier. Signed-off-by: Robert Richter --- drivers/edac/ghes_edac.c | 133 +++++++++++++++++++++++---------------- 1 file changed, 79 insertions(+), 54 deletions(-) diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c index 358519e8c2e9..5a4c9694bbff 100644 --- a/drivers/edac/ghes_edac.c +++ b/drivers/edac/ghes_edac.c @@ -462,16 +462,81 @@ static struct acpi_platform_list plat_list[] = { { } /* End */ }; -int ghes_edac_register(struct ghes *ghes, struct device *dev) +static struct mem_ctl_info *ghes_mc_create(struct device *dev, int mc_idx, + int num_dimm) { - bool fake = false; - int rc = 0, num_dimm = 0; + struct edac_mc_layer layers[1]; struct mem_ctl_info *mci; struct ghes_mci *pvt; - struct edac_mc_layer layers[1]; - struct ghes_dimm_fill dimm_fill; + + layers[0].type = EDAC_MC_LAYER_ALL_MEM; + layers[0].size = num_dimm; + layers[0].is_virt_csrow = true; + + mci = edac_mc_alloc(mc_idx, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + if (!mci) + return NULL; + + pvt = mci->pvt_info; + pvt->mci = mci; + + mci->pdev = dev; + mci->mtype_cap = MEM_FLAG_EMPTY; + mci->edac_ctl_cap = EDAC_FLAG_NONE; + mci->edac_cap = EDAC_FLAG_NONE; + mci->mod_name = "ghes_edac.c"; + mci->ctl_name = "ghes_edac"; + mci->dev_name = "ghes"; + + return mci; +} + +static int ghes_mc_add_or_free(struct mem_ctl_info *mci) +{ unsigned long flags; - int idx = -1; + int rc; + + rc = edac_mc_add_mc(mci); + if (rc < 0) { + edac_mc_free(mci); + return rc; + } + + spin_lock_irqsave(&ghes_lock, flags); + ghes_pvt = mci->pvt_info; + spin_unlock_irqrestore(&ghes_lock, flags); + + return 0; +} + +static void ghes_mc_free(void) +{ + struct mem_ctl_info *mci; + unsigned long flags; + + /* + * Wait for the irq handler being finished. + */ + spin_lock_irqsave(&ghes_lock, flags); + mci = ghes_pvt ? ghes_pvt->mci : NULL; + ghes_pvt = NULL; + spin_unlock_irqrestore(&ghes_lock, flags); + + if (!mci) + return; + + mci = edac_mc_del_mc(mci->pdev); + if (mci) + edac_mc_free(mci); +} + +int ghes_edac_register(struct ghes *ghes, struct device *dev) +{ + struct ghes_dimm_fill dimm_fill; + int rc = 0, num_dimm = 0; + struct mem_ctl_info *mci; + bool fake = false; + int idx; if (IS_ENABLED(CONFIG_X86)) { /* Check if safe to enable on this system */ @@ -500,28 +565,12 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev) num_dimm = 1; } - layers[0].type = EDAC_MC_LAYER_ALL_MEM; - layers[0].size = num_dimm; - layers[0].is_virt_csrow = true; - - mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); + mci = ghes_mc_create(dev, 0, num_dimm); if (!mci) { - pr_info("Can't allocate memory for EDAC data\n"); rc = -ENOMEM; goto unlock; } - pvt = mci->pvt_info; - pvt->mci = mci; - - mci->pdev = dev; - mci->mtype_cap = MEM_FLAG_EMPTY; - mci->edac_ctl_cap = EDAC_FLAG_NONE; - mci->edac_cap = EDAC_FLAG_NONE; - mci->mod_name = "ghes_edac.c"; - mci->ctl_name = "ghes_edac"; - mci->dev_name = "ghes"; - if (fake) { pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n"); pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n"); @@ -549,22 +598,17 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev) dimm->edac_mode = EDAC_SECDED; } - rc = edac_mc_add_mc(mci); - if (rc < 0) { - pr_info("Can't register at EDAC core\n"); - edac_mc_free(mci); - rc = -ENODEV; + rc = ghes_mc_add_or_free(mci); + if (rc) goto unlock; - } - - spin_lock_irqsave(&ghes_lock, flags); - ghes_pvt = pvt; - spin_unlock_irqrestore(&ghes_lock, flags); /* only set on success */ refcount_set(&ghes_refcount, 1); unlock: + if (rc) + pr_err("Can't register at EDAC core: %d\n", rc); + mutex_unlock(&ghes_reg_mutex); return rc; @@ -572,29 +616,10 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev) void ghes_edac_unregister(struct ghes *ghes) { - struct mem_ctl_info *mci; - unsigned long flags; - mutex_lock(&ghes_reg_mutex); - if (!refcount_dec_and_test(&ghes_refcount)) - goto unlock; - - /* - * Wait for the irq handler being finished. - */ - spin_lock_irqsave(&ghes_lock, flags); - mci = ghes_pvt ? ghes_pvt->mci : NULL; - ghes_pvt = NULL; - spin_unlock_irqrestore(&ghes_lock, flags); - - if (!mci) - goto unlock; - - mci = edac_mc_del_mc(mci->pdev); - if (mci) - edac_mc_free(mci); + if (refcount_dec_and_test(&ghes_refcount)) + ghes_mc_free(); -unlock: mutex_unlock(&ghes_reg_mutex); }