diff mbox series

[v2,2/3] EDAC/mce_amd: Extract node id from InstanceHi in IPID

Message ID 20210806074350.114614-3-nchatrad@amd.com (mailing list archive)
State New, archived
Headers show
Series x86/edac/amd64: Add support for noncpu nodes | expand

Commit Message

Naveen Krishna Chatradhi Aug. 6, 2021, 7:43 a.m. UTC
On AMD systems with SMCA banks on NONCPU nodes, the node id
information is available in MCA_IPID[47:44](InstanceIdHi).

Signed-off-by: Muralidhara M K <muralimk@amd.com>
Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com>
---
Changes since v1:
1. Modified the commit message
2. rearranged the conditions before calling decode_dram_ecc()

 drivers/edac/mce_amd.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

Comments

Yazen Ghannam Aug. 20, 2021, 3:43 p.m. UTC | #1
On Fri, Aug 06, 2021 at 01:13:49PM +0530, Naveen Krishna Chatradhi wrote:
> On AMD systems with SMCA banks on NONCPU nodes, the node id
> information is available in MCA_IPID[47:44](InstanceIdHi).
>

The bitfield name in the $SUBJECT is wrong.

Also, the commit message implies that this behavior applies to all MCA
banks on systems with NONCPU nodes. But rather it only applies to the
banks on the NONCPU nodes.

Thanks,
Yazen
diff mbox series

Patch

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 27d56920b469..318b7fb715ff 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -1072,8 +1072,23 @@  static void decode_smca_error(struct mce *m)
 	if (xec < smca_mce_descs[bank_type].num_descs)
 		pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]);
 
-	if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc)
-		decode_dram_ecc(topology_die_id(m->extcpu), m);
+	if (xec == 0 && decode_dram_ecc) {
+		int node_id = 0;
+
+		if (bank_type == SMCA_UMC) {
+			node_id = topology_die_id(m->extcpu);
+		} else if (bank_type == SMCA_UMC_V2) {
+			/*
+			 * SMCA_UMC_V2 is used on the noncpu nodes, extract
+			 * the node id from MCA_IPID[47:44](InstanceIdHi)
+			 */
+			node_id = ((m->ipid >> 44) & 0xF);
+		} else {
+			return;
+		}
+
+		decode_dram_ecc(node_id, m);
+	}
 }
 
 static inline void amd_decode_err_code(u16 ec)