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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2021 17:58:24.9865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7e29377e-1a7f-41c1-2a18-08d99a3c89df X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT064.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4404 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Move code to find the interleave address bit into a separate helper function. Signed-off-by: Yazen Ghannam --- Link: https://lkml.kernel.org/r/20210623192002.3671647-17-yazen.ghannam@amd.com v2->v3: * Was patch 16 in v2. v1->v2: * Moved from arch/x86 to EDAC. drivers/edac/amd64_edac.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index f4074bc270ec..6b19fc5cf340 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1172,25 +1172,33 @@ static int get_dram_addr_map(struct addr_ctx *ctx) return 0; } -static int denormalize_addr(struct addr_ctx *ctx) +static int get_intlv_addr_bit(struct addr_ctx *ctx) { - u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask; - u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets; u8 intlv_addr_sel = (ctx->reg_base_addr >> 8) & 0x7; - u8 num_intlv_bits, cs_mask = 0; /* {0, 1, 2, 3} map to address bits {8, 9, 10, 11} respectively */ if (intlv_addr_sel > 3) { - pr_err("%s: Invalid interleave address select %d.\n", - __func__, intlv_addr_sel); + pr_debug("Invalid interleave address select %d.\n", intlv_addr_sel); return -EINVAL; } + ctx->intlv_addr_bit = intlv_addr_sel + 8; + + return 0; +} + +static int denormalize_addr(struct addr_ctx *ctx) +{ + u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask; + u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets; + u8 num_intlv_bits, cs_mask = 0; + + if (get_intlv_addr_bit(ctx)) + return -EINVAL; + intlv_num_sockets = (ctx->reg_limit_addr >> 8) & 0x1; intlv_num_dies = (ctx->reg_limit_addr >> 10) & 0x3; - ctx->intlv_addr_bit = intlv_addr_sel + 8; - /* Re-use intlv_num_chan by setting it equal to log2(#channels) */ switch (intlv_num_chan) { case 0: intlv_num_chan = 0; break;