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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT022.mail.protection.outlook.com (10.13.175.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4930.15 via Frontend Transport; Thu, 27 Jan 2022 20:41:34 +0000 Received: from yaz-ethanolx.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Thu, 27 Jan 2022 14:41:33 -0600 From: Yazen Ghannam To: CC: , , , , , , , Yazen Ghannam Subject: [PATCH v4 01/24] EDAC/amd64: Define Data Fabric operations Date: Thu, 27 Jan 2022 20:40:52 +0000 Message-ID: <20220127204115.384161-2-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220127204115.384161-1-yazen.ghannam@amd.com> References: <20220127204115.384161-1-yazen.ghannam@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e6bd5d02-1723-4404-9f00-08d9e1d5688a X-MS-TrafficTypeDiagnostic: MN2PR12MB3456:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2022 20:41:34.5959 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e6bd5d02-1723-4404-9f00-08d9e1d5688a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT022.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3456 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Define a stub to hold operations for different Data Fabric versions. This will be filled in following patches. Set the operations at init-time as appropriate for each model/family group. Also, start a glossary of acronyms used in the translation code. Signed-off-by: Yazen Ghannam --- Link: https://lore.kernel.org/r/20211028175728.121452-6-yazen.ghannam@amd.com v3->v4: * Started glossary. * Included pr_debug() for failing case. v2->v3: * Was patch 6 in v2. * "df_ops" is set at init time. v1->v2: * New in v2. drivers/edac/amd64_edac.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index fba609ada0e6..639dfbea3348 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -988,6 +988,12 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr) return csrow; } +/* + * Glossary of acronyms used in address translation for Zen-based systems + * + * DF = Data Fabric + */ + /* Protect the PCI config register pairs used for DF indirect access. */ static DEFINE_MUTEX(df_indirect_mutex); @@ -1058,6 +1064,14 @@ struct addr_ctx { u8 inst_id; }; +struct data_fabric_ops { +}; + +struct data_fabric_ops df2_ops = { +}; + +struct data_fabric_ops *df_ops; + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { u64 dram_base_addr, dram_limit_addr, dram_hole_base; @@ -1072,6 +1086,11 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr struct addr_ctx ctx; + if (!df_ops) { + pr_debug("Data Fabric Operations not set"); + return -EINVAL; + } + memset(&ctx, 0, sizeof(ctx)); /* Start from the normalized address */ @@ -3958,6 +3977,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) if (pvt->model >= 0x10 && pvt->model <= 0x2f) { fam_type = &family_types[F17_M10H_CPUS]; pvt->ops = &family_types[F17_M10H_CPUS].ops; + df_ops = &df2_ops; break; } else if (pvt->model >= 0x30 && pvt->model <= 0x3f) { fam_type = &family_types[F17_M30H_CPUS]; @@ -3976,6 +3996,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) case 0x18: fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; + df_ops = &df2_ops; if (pvt->fam == 0x18) family_types[F17_CPUS].ctl_name = "F18h";