Message ID | 20220127204115.384161-23-yazen.ghannam@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Series |
AMD MCA Address Translation Updates
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expand
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diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index e293aefd486e..601ececf5106 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1142,7 +1142,7 @@ static int dehash_addr_df2(struct addr_ctx *ctx) (ctx->ret_addr >> 18) ^ (ctx->ret_addr >> 21) ^ (ctx->ret_addr >> 30) ^ - ctx->cs_id; + (ctx->ret_addr >> ctx->intlv_addr_bit); hashed_bit &= BIT(0);
The reference code for DF2 hashing was changed to XOR the interleave address bit rather than the CS ID. Match that here. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- Link: https://lore.kernel.org/r/20211028175728.121452-28-yazen.ghannam@amd.com v3->v4: * No change. v2->v3: * Was patch 28 in v2. v1->v2: * Moved from arch/x86 to EDAC. drivers/edac/amd64_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)