From patchwork Sat Sep 10 19:49:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 12972637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FF1BECAAD3 for ; Sat, 10 Sep 2022 19:51:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229971AbiIJTvR (ORCPT ); Sat, 10 Sep 2022 15:51:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229514AbiIJTum (ORCPT ); Sat, 10 Sep 2022 15:50:42 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5B971357CC; Sat, 10 Sep 2022 12:50:36 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id E4F11DBD; Sat, 10 Sep 2022 22:54:15 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com E4F11DBD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1662839655; bh=7oxTCcdZn6sggJjecNsCjWOvQGrUZ+sNGK+R5hHHxgo=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=JiqjqKCuc86MwWvmV6YBZkU3cCB8R6WxXWYqpJAdvHF35frzn6jqTdBYNItlhBovq 7iIKrEMd4bHFC8P+xwOYJkQDy+82H0yvbBU7hDyiCeHEL1dmSmtlidXPjMrUFB7uAa kXsa/OCPxuUggTjDl3ZxTXeaMjF7Jos6E55GhlZg= Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 10 Sep 2022 22:50:25 +0300 From: Serge Semin To: Michal Simek , Borislav Petkov , Mauro Carvalho Chehab , Tony Luck , James Morse , Robert Richter CC: Serge Semin , Serge Semin , Alexey Malahov , Michail Ivanov , Pavel Parkhomenko , Punnaiah Choudary Kalluri , Manish Narani , Dinh Nguyen , , , Subject: [PATCH RESEND v2 10/18] EDAC/synopsys: Get corrected bit position Date: Sat, 10 Sep 2022 22:49:59 +0300 Message-ID: <20220910195007.11027-11-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220910195007.11027-1-Sergey.Semin@baikalelectronics.ru> References: <20220910195007.11027-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Since the DQ-bus width is now available in the driver we can use it to calculate the bit-position corrected by the ECC engine. It can be done based on the offsets provided in the table [1]. Using info from that table let's introduce a new inline method snps_get_bitpos() which would provide the actual CE bit-position based on the value read from the ECCSTAT.corrected_bit_num field and the DQ-bus width. The method will be called if a corrected error is detected. [1] DesignWare® Cores Enhanced Universal DDR Memory Controller (uMCTL2) Databook, Version 3.91a, October 2020, p.426-427 Signed-off-by: Serge Semin --- drivers/edac/synopsys_edac.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index c0e5476d5c85..1cfbc5a2a564 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -357,6 +358,27 @@ struct snps_edac_priv { #endif }; +/** + * snps_get_bitpos - Get DQ-bus corrected bit position. + * @bitnum: Bit number retrieved from the ECCSTAT.corrected_bit_num field. + * @dq_width: Controller DQ-bus width. + * + * Return: actual corrected DQ-bus bit position starting from 0. + */ +static inline u32 snps_get_bitpos(u32 bitnum, enum snps_dq_width dq_width) +{ + /* ecc[0] bit */ + if (bitnum == 0) + return BITS_PER_BYTE << dq_width; + + /* ecc[1:x] bit */ + if (is_power_of_2(bitnum)) + return (BITS_PER_BYTE << dq_width) + ilog2(bitnum) + 1; + + /* data[0:y] bit */ + return bitnum - ilog2(bitnum) - 2; +} + /** * snps_get_error_info - Get the current ECC error info. * @priv: DDR memory controller private instance data. @@ -385,6 +407,8 @@ static int snps_get_error_info(struct snps_edac_priv *priv) if (!p->ce_cnt) goto ue_err; + p->ceinfo.bitpos = snps_get_bitpos(p->ceinfo.bitpos, priv->info.dq_width); + regval = readl(base + ECC_CEADDR0_OFST); p->ceinfo.row = FIELD_GET(ECC_CEADDR0_ROW_MASK, regval);