| Message ID | 20230706171323.3722900-4-avadhut.naik@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Updates for AMD Family 1Ah-based Models | expand |
On 7/6/2023 1:13 PM, Avadhut Naik wrote: > From: Avadhut Naik <Avadhut.Naik@amd.com> > > Add the necessary support in the module for AMD's new Family 1Ah-based > models 00h-1Fh and 40h-4Fh. > The first patch in this set adds PCI IDs for models starting at 20h. And this patch adds support for models 40h-4Fh. Can you please elaborate on the discrepancy? Thanks, Yazen
On 8/3/2023 7:25 PM, Yazen Ghannam wrote: > On 7/6/2023 1:13 PM, Avadhut Naik wrote: >> From: Avadhut Naik <Avadhut.Naik@amd.com> >> >> Add the necessary support in the module for AMD's new Family 1Ah-based >> models 00h-1Fh and 40h-4Fh. >> > > The first patch in this set adds PCI IDs for models starting at 20h. And > this patch adds support for models 40h-4Fh. > > Can you please elaborate on the discrepancy? > > Thanks, > Yazen > Model 40h-4fh shares some of the same design as some other platforms. The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it.
On 8/4/2023 12:03 PM, Limonciello, Mario wrote: > > > On 8/3/2023 7:25 PM, Yazen Ghannam wrote: >> On 7/6/2023 1:13 PM, Avadhut Naik wrote: >>> From: Avadhut Naik <Avadhut.Naik@amd.com> >>> >>> Add the necessary support in the module for AMD's new Family 1Ah-based >>> models 00h-1Fh and 40h-4Fh. >>> >> >> The first patch in this set adds PCI IDs for models starting at 20h. >> And this patch adds support for models 40h-4Fh. >> >> Can you please elaborate on the discrepancy? >> >> Thanks, >> Yazen >> > > Model 40h-4fh shares some of the same design as some other platforms. > > The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID > PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it. That's fair. Can these details be included in the commit message? Thanks, Yazen
Hi, On 8/7/2023 08:48, Yazen Ghannam wrote: > On 8/4/2023 12:03 PM, Limonciello, Mario wrote: >> >> >> On 8/3/2023 7:25 PM, Yazen Ghannam wrote: >>> On 7/6/2023 1:13 PM, Avadhut Naik wrote: >>>> From: Avadhut Naik <Avadhut.Naik@amd.com> >>>> >>>> Add the necessary support in the module for AMD's new Family 1Ah-based >>>> models 00h-1Fh and 40h-4Fh. >>>> >>> >>> The first patch in this set adds PCI IDs for models starting at 20h. And this patch adds support for models 40h-4Fh. >>> >>> Can you please elaborate on the discrepancy? >>> >>> Thanks, >>> Yazen >>> >> >> Model 40h-4fh shares some of the same design as some other platforms. >> >> The root port ID PCI_DEVICE_ID_AMD_19H_M60H_ROOT and DF_F3 ID PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 covers it. > > That's fair. Can these details be included in the commit message? > Sure thing! Will include these details in the commit message of the first patch where PCI IDs are being defined. > Thanks, > Yazen
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 597dae7692b1..e3b59c488ed1 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -4150,6 +4150,20 @@ static int per_family_init(struct amd64_pvt *pvt) } break; + case 0x1A: + switch (pvt->model) { + case 0x00 ... 0x1f: + pvt->ctl_name = "F1Ah"; + pvt->max_mcs = 12; + pvt->flags.zn_regs_v2 = 1; + break; + case 0x40 ... 0x4f: + pvt->ctl_name = "F1Ah_M40h"; + pvt->flags.zn_regs_v2 = 1; + break; + } + break; + default: amd64_err("Unsupported family!\n"); return -ENODEV; @@ -4344,6 +4358,7 @@ static const struct x86_cpu_id amd64_cpuids[] = { X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL), X86_MATCH_VENDOR_FAM(HYGON, 0x18, NULL), X86_MATCH_VENDOR_FAM(AMD, 0x19, NULL), + X86_MATCH_VENDOR_FAM(AMD, 0x1A, NULL), { } }; MODULE_DEVICE_TABLE(x86cpu, amd64_cpuids);