| Message ID | 20240709-imx95_edac-v1-4-3e9c146c1b01@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | EDAC: fsl-ddr, add imx9 support | expand |
On 09/07/2024 22:23, Frank Li wrote: > iMX9 memory controller is similar with other layerscape chips. But some > register layout has a little bit difference, so add new compatible string > 'nxp,imx9-memory-controller' for it. > > imx9 need two 'reg', one for DDR controller and the other is ECC inject > engine register space. Keep the same restriction for other compatible > string. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> I assume this will go via EDAC tree (not memory-controllers tree). Best regards, Krzysztof
Hi Frank, Am Dienstag, 9. Juli 2024, 22:23:05 CEST schrieb Frank Li: > iMX9 memory controller is similar with other layerscape chips. But some > register layout has a little bit difference, so add new compatible string > 'nxp,imx9-memory-controller' for it. Is this controller the same for all i.MX9 SoC? E.g. i.MX91, i.MX93, i.MX95 and any future variants? Best regards, Alexander > imx9 need two 'reg', one for DDR controller and the other is ECC inject > engine register space. Keep the same restriction for other compatible > string. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../bindings/memory-controllers/fsl/fsl,ddr.yaml | 31 +++++++++++++++++++++- > 1 file changed, 30 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > index 84f778a99546b..e0786153eec73 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > @@ -40,6 +40,7 @@ properties: > - fsl,p1021-memory-controller > - fsl,p2020-memory-controller > - fsl,qoriq-memory-controller > + - nxp,imx9-memory-controller > > interrupts: > maxItems: 1 > @@ -51,13 +52,41 @@ properties: > type: boolean > > reg: > - maxItems: 1 > + items: > + - description: Controller register space > + - description: Inject register space > + minItems: 1 > + > + reg-names: > + items: > + - const: ctrl > + - const: inject > + minItems: 1 > > required: > - compatible > - interrupts > - reg > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - nxp,imx9-memory-controller > + then: > + properties: > + reg: > + minItems: 2 > + reg-names: > + minItems: 2 > + else: > + properties: > + reg: > + maxItems: 1 > + reg-names: false > + > additionalProperties: false > > examples: > >
On Wed, Jul 10, 2024 at 09:18:16AM +0200, Alexander Stein wrote: > Hi Frank, > > Am Dienstag, 9. Juli 2024, 22:23:05 CEST schrieb Frank Li: > > iMX9 memory controller is similar with other layerscape chips. But some > > register layout has a little bit difference, so add new compatible string > > 'nxp,imx9-memory-controller' for it. > > Is this controller the same for all i.MX9 SoC? E.g. i.MX91, i.MX93, > i.MX95 and any future variants? So far it is the same. I can't prodicting future. Not plan to change it yet. Frank > > Best regards, > Alexander > > > imx9 need two 'reg', one for DDR controller and the other is ECC inject > > engine register space. Keep the same restriction for other compatible > > string. > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > .../bindings/memory-controllers/fsl/fsl,ddr.yaml | 31 +++++++++++++++++++++- > > 1 file changed, 30 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > index 84f778a99546b..e0786153eec73 100644 > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > @@ -40,6 +40,7 @@ properties: > > - fsl,p1021-memory-controller > > - fsl,p2020-memory-controller > > - fsl,qoriq-memory-controller > > + - nxp,imx9-memory-controller > > > > interrupts: > > maxItems: 1 > > @@ -51,13 +52,41 @@ properties: > > type: boolean > > > > reg: > > - maxItems: 1 > > + items: > > + - description: Controller register space > > + - description: Inject register space > > + minItems: 1 > > + > > + reg-names: > > + items: > > + - const: ctrl > > + - const: inject > > + minItems: 1 > > > > required: > > - compatible > > - interrupts > > - reg > > > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - nxp,imx9-memory-controller > > + then: > > + properties: > > + reg: > > + minItems: 2 > > + reg-names: > > + minItems: 2 > > + else: > > + properties: > > + reg: > > + maxItems: 1 > > + reg-names: false > > + > > additionalProperties: false > > > > examples: > > > > > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-group.com/ > >
Hi Frank, Am Freitag, 12. Juli 2024, 05:27:54 CEST schrieb Frank Li: > On Wed, Jul 10, 2024 at 09:18:16AM +0200, Alexander Stein wrote: > > Hi Frank, > > > > Am Dienstag, 9. Juli 2024, 22:23:05 CEST schrieb Frank Li: > > > iMX9 memory controller is similar with other layerscape chips. But some > > > register layout has a little bit difference, so add new compatible string > > > 'nxp,imx9-memory-controller' for it. > > > > Is this controller the same for all i.MX9 SoC? E.g. i.MX91, i.MX93, > > i.MX95 and any future variants? > > So far it is the same. I can't prodicting future. Not plan to change it > yet. Okay, thanks for clarification. If DT maintainers are okay this way, I do not object. Best regards, Alexander > Frank > > > > > Best regards, > > Alexander > > > > > imx9 need two 'reg', one for DDR controller and the other is ECC inject > > > engine register space. Keep the same restriction for other compatible > > > string. > > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > --- > > > .../bindings/memory-controllers/fsl/fsl,ddr.yaml | 31 +++++++++++++++++++++- > > > 1 file changed, 30 insertions(+), 1 deletion(-) > > > > > > diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > > index 84f778a99546b..e0786153eec73 100644 > > > --- a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > > +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml > > > @@ -40,6 +40,7 @@ properties: > > > - fsl,p1021-memory-controller > > > - fsl,p2020-memory-controller > > > - fsl,qoriq-memory-controller > > > + - nxp,imx9-memory-controller > > > > > > interrupts: > > > maxItems: 1 > > > @@ -51,13 +52,41 @@ properties: > > > type: boolean > > > > > > reg: > > > - maxItems: 1 > > > + items: > > > + - description: Controller register space > > > + - description: Inject register space > > > + minItems: 1 > > > + > > > + reg-names: > > > + items: > > > + - const: ctrl > > > + - const: inject > > > + minItems: 1 > > > > > > required: > > > - compatible > > > - interrupts > > > - reg > > > > > > +allOf: > > > + - if: > > > + properties: > > > + compatible: > > > + contains: > > > + enum: > > > + - nxp,imx9-memory-controller > > > + then: > > > + properties: > > > + reg: > > > + minItems: 2 > > > + reg-names: > > > + minItems: 2 > > > + else: > > > + properties: > > > + reg: > > > + maxItems: 1 > > > + reg-names: false > > > + > > > additionalProperties: false > > > > > > examples: > > > > > > > > > > > > >
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml index 84f778a99546b..e0786153eec73 100644 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml @@ -40,6 +40,7 @@ properties: - fsl,p1021-memory-controller - fsl,p2020-memory-controller - fsl,qoriq-memory-controller + - nxp,imx9-memory-controller interrupts: maxItems: 1 @@ -51,13 +52,41 @@ properties: type: boolean reg: - maxItems: 1 + items: + - description: Controller register space + - description: Inject register space + minItems: 1 + + reg-names: + items: + - const: ctrl + - const: inject + minItems: 1 required: - compatible - interrupts - reg +allOf: + - if: + properties: + compatible: + contains: + enum: + - nxp,imx9-memory-controller + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + reg-names: false + additionalProperties: false examples:
iMX9 memory controller is similar with other layerscape chips. But some register layout has a little bit difference, so add new compatible string 'nxp,imx9-memory-controller' for it. imx9 need two 'reg', one for DDR controller and the other is ECC inject engine register space. Keep the same restriction for other compatible string. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- .../bindings/memory-controllers/fsl/fsl,ddr.yaml | 31 +++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-)