diff mbox series

[RFC,v2,1/2] x86/mce: Set a more accurate value for mce_num_banks

Message ID 20240829223225.223639-2-yazen.ghannam@amd.com (mailing list archive)
State New
Headers show
Series CPU offlining with non-core MCA banks | expand

Commit Message

Yazen Ghannam Aug. 29, 2024, 10:32 p.m. UTC 
Some systems advertise more MCA banks than are actually used. For
example, MCG_CAP[Count] gives 64 banks, but banks 32-63 are not used,
i.e. Read-as-Zero/Writes-Ignored.

This causes more time spent checking, or trying to setup, banks that are
not used.

Currently, valid banks are already checked for during initialization.
Extend this to keep track of the last valid bank found and update
mce_num_banks to reflect this.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
 arch/x86/kernel/cpu/mce/core.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 2a938f429c4d..33893b5c8b0c 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1866,8 +1866,8 @@  static void __mcheck_cpu_init_clear_banks(void)
 static void __mcheck_cpu_check_banks(void)
 {
 	struct mce_bank *mce_banks = this_cpu_ptr(mce_banks_array);
+	int i, last_bank;
 	u64 msrval;
-	int i;
 
 	for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
 		struct mce_bank *b = &mce_banks[i];
@@ -1877,7 +1877,12 @@  static void __mcheck_cpu_check_banks(void)
 
 		rdmsrl(mca_msr_reg(i, MCA_CTL), msrval);
 		b->init = !!msrval;
+
+		if (b->init)
+			last_bank = i;
 	}
+
+	this_cpu_write(mce_num_banks, last_bank + 1);
 }
 
 /* Add per CPU specific workarounds here */