From patchwork Thu Aug 23 10:55:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 1366351 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 52E80DF2AB for ; Thu, 23 Aug 2012 10:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030390Ab2HWKzV (ORCPT ); Thu, 23 Aug 2012 06:55:21 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:12193 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030305Ab2HWKzT (ORCPT ); Thu, 23 Aug 2012 06:55:19 -0400 Received: from epcpsbgm2.samsung.com (mailout2.samsung.com [203.254.224.25]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M9700LRRFMUCG00@mailout2.samsung.com> for linux-fbdev@vger.kernel.org; Thu, 23 Aug 2012 19:55:13 +0900 (KST) X-AuditID: cbfee61b-b7faf6d00000476a-b5-50360c11d02e Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 4B.33.18282.11C06305; Thu, 23 Aug 2012 19:55:13 +0900 (KST) Received: from DOJG1HAN02 ([12.23.119.56]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M9700B4VFO14G60@mmp1.samsung.com> for linux-fbdev@vger.kernel.org; Thu, 23 Aug 2012 19:55:13 +0900 (KST) From: Jingoo Han To: 'Florian Tobias Schandinat' Cc: linux-fbdev@vger.kernel.org, 'Jingoo Han' Subject: [PATCH 2/2] video: exynos_dp: move setting analog parameter and interrupt to after sw reset Date: Thu, 23 Aug 2012 19:55:13 +0900 Message-id: <000b01cd811d$c5890b60$509b2220$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac2BHcV0D8Z7Rb8yRXabDBMp4TVM9g== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrELMWRmVeSWpSXmKPExsVy+t9jAV1BHrMAg3tN4hYn+j6wOjB6fN4k F8AYxWWTkpqTWZZapG+XwJWx6r5YwWfuigsPbjE1MM7n6mLk5JAQMJG4uKOdDcIWk7hwbz2Q zcUhJLCIUeLkp2dQziwmicU3PzKDVLEJqEl8+XKYvYuRg0NEwEpi01ZNkDCzgLPEhBsnwAYJ C6RJXHrwiAnEZhFQlXi9bhETSDmvgK3E1bnhIGFeAUGJH5PvsUC0akms33mcCcKWl9i85i0z SLmEgLrEo7+6IGERAT2Jd0/PsUKUiEjse/GOcQKjwCwkk2YhmTQLyaRZSFoWMLKsYhRNLUgu KE5KzzXSK07MLS7NS9dLzs/dxAgOyWfSOxhXNVgcYhTgYFTi4Q24ZxogxJpYVlyZe4hRgoNZ SYTXi9MsQIg3JbGyKrUoP76oNCe1+BCjNAeLkjgvf59hgJBAemJJanZqakFqEUyWiYNTqoFR aac+t3uU0ePzO3ilBPZeKZG2b2SYsO/s3Q+q6hrxSzNqZpSvaaqsPGgW9d/4vMVMGa+fF3PE a3fpNFf/vVqX8jwnefu++8/2pCxh+CxfG79c0Z6rK8Hqmw/nj3XaVewCkdND9lx/31n47IP3 L89zKhP4C1pnPt1xKvXCUkvLUzaq8W7bq6WVWIozEg21mIuKEwH4kHpERQIAAA== X-TM-AS-MML: No Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org SW reset sets DP TX to initial value, so configurations for analog parameter and interrupt are not set properly. Therefore, exynos_dp_init_analog_param() and exynos_dp_init_interrupt() should be moved to after sw reset is called, in order to set these values properly. Signed-off-by: Jingoo Han --- drivers/video/exynos/exynos_dp_core.c | 3 +++ drivers/video/exynos/exynos_dp_reg.c | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/video/exynos/exynos_dp_core.c b/drivers/video/exynos/exynos_dp_core.c index c6c016a..8113698 100644 --- a/drivers/video/exynos/exynos_dp_core.c +++ b/drivers/video/exynos/exynos_dp_core.c @@ -29,6 +29,9 @@ static int exynos_dp_init_dp(struct exynos_dp_device *dp) exynos_dp_swreset(dp); + exynos_dp_init_analog_param(dp); + exynos_dp_init_interrupt(dp); + /* SW defined function Normal operation */ exynos_dp_enable_sw_function(dp); diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c index e29497b..9a862f5 100644 --- a/drivers/video/exynos/exynos_dp_reg.c +++ b/drivers/video/exynos/exynos_dp_reg.c @@ -148,9 +148,6 @@ void exynos_dp_reset(struct exynos_dp_device *dp) writel(0x2, dp->reg_base + EXYNOS_DP_M_AUD_GEN_FILTER_TH); writel(0x00000101, dp->reg_base + EXYNOS_DP_SOC_GENERAL_CTL); - - exynos_dp_init_analog_param(dp); - exynos_dp_init_interrupt(dp); } void exynos_dp_swreset(struct exynos_dp_device *dp)