From patchwork Tue Oct 16 02:17:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 1598441 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id D42AFDFB34 for ; Tue, 16 Oct 2012 02:17:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752664Ab2JPCRf (ORCPT ); Mon, 15 Oct 2012 22:17:35 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:51416 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752218Ab2JPCRe (ORCPT ); Mon, 15 Oct 2012 22:17:34 -0400 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MBY00IGWROULS70@mailout1.samsung.com>; Tue, 16 Oct 2012 11:17:33 +0900 (KST) X-AuditID: cbfee61a-b7f976d000001eb9-d9-507cc3bc0657 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id D5.8D.07865.CB3CC705; Tue, 16 Oct 2012 11:17:33 +0900 (KST) Received: from DOJG1HAN02 ([12.23.120.99]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MBY0056ZRP8WE30@mmp2.samsung.com>; Tue, 16 Oct 2012 11:17:32 +0900 (KST) From: Jingoo Han To: 'Florian Tobias Schandinat' Cc: linux-fbdev@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, 'Ajay Kumar' , 'Sylwester Nawrocki' , 'Tomasz Figa' , 'Thomas Abraham' , 'Jingoo Han' References: In-reply-to: Subject: [PATCH V8 2/2] video: exynos_dp: device tree documentation Date: Tue, 16 Oct 2012 11:17:32 +0900 Message-id: <005c01cdab44$666eb6b0$334c2410$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac2rREXYPI6y9hofRtWykySuwcaUeAAAARmw Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDLMWRmVeSWpSXmKPExsVy+t9jQd29h2sCDKauZrE40feB1WLG+X1M DkwenzfJBTBGcdmkpOZklqUW6dslcGU8etHIXHBComL3Ua8Gxr/CXYwcHBICJhKTrwl0MXIC mWISF+6tZ+ti5OIQEpjOKNH7YSMLSEJI4BejxJoWYxCbTUBN4suXw+wgvSICVhKbtmqC1DML HGWSmPPjADNIXEiAW2J1cxBIOacAj8S6P53MILawgLPElisT2UFsFgFViW9vW9lAynkFbCW+ 9uSDhHkFBCV+TL4HtpVZQEti/c7jTBC2vMTmNW+ZIS5Wl3j0VxfiACOJXX99ISpEJPa9eMc4 gVFoFpJBs5AMmoVk0CwkLQsYWVYxiqYWJBcUJ6XnGuoVJ+YWl+al6yXn525iBIfxM6kdjCsb LA4xCnAwKvHwZjjXBAixJpYVV+YeYpTgYFYS4fWYCBTiTUmsrEotyo8vKs1JLT7EKM3BoiTO 2+yREiAkkJ5YkpqdmlqQWgSTZeLglGpgnNLwroLjAcOqqby+O1dsTrTdZyMyYWLpnxk5i/om r129rspk4muLS9wGRus/tAVJHW+UCFhRtN30+zfjiAj9X0dmZn6QkK/4511j9suv38OjiuFW x6e8W/c7MuZ3ruqX3bqqSfz9EbHSxRGVlZUzWA963xP5Vcf26/iu1WoF85lviG25cOaMmhJL cUaioRZzUXEiAMDAUz9fAgAA Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org From: Ajay Kumar Add documentation for the DT bindings in exynos display port driver. Signed-off-by: Ajay Kumar Signed-off-by: Jingoo Han --- No changes since v7: .../devicetree/bindings/video/exynos_dp.txt | 80 ++++++++++++++++++++ 1 files changed, 80 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/video/exynos_dp.txt diff --git a/Documentation/devicetree/bindings/video/exynos_dp.txt b/Documentation/devicetree/bindings/video/exynos_dp.txt new file mode 100644 index 0000000..7cc7d9f --- /dev/null +++ b/Documentation/devicetree/bindings/video/exynos_dp.txt @@ -0,0 +1,80 @@ +The Exynos display port interface should be configured based on +the type of panel connected to it. + +We use two nodes: + -display-port-controller node + -dptx-phy node(defined inside display-port-controller node) + +For the DP-PHY initialization, we use the dptx-phy node. +Required properties for dptx-phy: + -reg: + Base address of DP PHY register. + -samsung,enable-mask: + The bit-mask used to enable/disable DP PHY. + +For the Panel initialization, we read data from display-port-controller node. +Required properties for display-port-controller: + -compatible: + should be "samsung,exynos5-dp". + -reg: + physical base address of the controller and length + of memory mapped region. + -interrupts: + interrupt combiner values. + -interrupt-parent: + phandle to Interrupt combiner node. + -samsung,color-space: + input video data format. + COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 + -samsung,dynamic-range: + dynamic range for input video data. + VESA = 0, CEA = 1 + -samsung,ycbcr-coeff: + YCbCr co-efficients for input video. + COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1 + -samsung,color-depth: + number of bits per colour component. + COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3 + -samsung,link-rate: + link rate supported by the panel. + LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A + -samsung,lane-count: + number of lanes supported by the panel. + LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4 + +Optional properties for display-port-controller: + -interlaced: + interlace scan mode. + Progressive if defined, Interlaced if not defined + -vsync-active-high: + VSYNC polarity configuration. + High if defined, Low if not defined + -hsync-active-high: + HSYNC polarity configuration. + High if defined, Low if not defined + +Example: + +SOC specific portion: + display-port-controller { + compatible = "samsung,exynos5-dp"; + reg = <0x145b0000 0x10000>; + interrupts = <10 3>; + interrupt-parent = <&combiner>; + + dptx-phy { + reg = <0x10040720>; + samsung,enable-mask = <1>; + }; + + }; + +Board Specific portion: + display-port-controller { + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + };