From patchwork Wed Jul 18 15:34:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manjunathappa, Prakash" X-Patchwork-Id: 1211871 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 5B184DFFFD for ; Wed, 18 Jul 2012 15:49:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751687Ab2GRPtm (ORCPT ); Wed, 18 Jul 2012 11:49:42 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:46570 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752049Ab2GRPtl (ORCPT ); Wed, 18 Jul 2012 11:49:41 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q6IFnb2k024944; Wed, 18 Jul 2012 10:49:37 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q6IFnZST025832; Wed, 18 Jul 2012 21:19:35 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 18 Jul 2012 21:19:35 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id q6IFnYnu020332; Wed, 18 Jul 2012 21:19:34 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id C98A7158002; Wed, 18 Jul 2012 21:19:34 +0530 (IST) Received: from linux-psp-server.india.ext.ti.com (linux-psp-server [192.168.247.76]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q6IFnYI01883; Wed, 18 Jul 2012 21:19:34 +0530 (IST) From: "Manjunathappa, Prakash" To: CC: Florian Tobias Schandinat , , , "Manjunathappa, Prakash" Subject: [PATCH v2 2/2] arm: da850: configure LCDC fifo threshold Date: Wed, 18 Jul 2012 21:04:57 +0530 Message-ID: <1342625697-7515-1-git-send-email-prakash.pm@ti.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Configure fifo threshold in raster dma_control register to 512 bytes. This reduces LCDC underflow errors. Signed-off-by: Manjunathappa, Prakash --- Seems like version 1 of this patch did not reach fbdev mailing list. Since v1: No change, resending it as other patch in series has changed. arch/arm/mach-davinci/devices-da8xx.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index d1624a3..783eab6 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -546,6 +546,7 @@ static struct lcd_ctrl_config lcd_cfg = { .sync_edge = 0, .sync_ctrl = 1, .raster_order = 0, + .fifo_th = 6, }; struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {