From patchwork Wed Aug 8 03:54:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 1292391 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id EFF10DF223 for ; Wed, 8 Aug 2012 03:54:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756482Ab2HHDym (ORCPT ); Tue, 7 Aug 2012 23:54:42 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:48841 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756260Ab2HHDyl (ORCPT ); Tue, 7 Aug 2012 23:54:41 -0400 Received: by mail-pb0-f46.google.com with SMTP id rr13so760482pbb.19 for ; Tue, 07 Aug 2012 20:54:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=3Q5JFvO8qYLVjlJNA88ou6RloZ9U11s42ntNaa/m90w=; b=PemTX5ZptaGRCYL2i7ORrEhaG5LGiwFEj8SCfsXq7vhDwSXtpFii0x4N/noUiN4tZI tReRjxpAbFvCgqOMiblZK2zgHYPSQfy9PQUQAzvLxYM4IMSpwJ8Qcc/m39SuYuyHbXK/ WpF0HXx6stdrQJg6lZM5Pt8pOC85J9OVWupzc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3Q5JFvO8qYLVjlJNA88ou6RloZ9U11s42ntNaa/m90w=; b=bNIM46VnRwPoOTGJOiVfRw6qt8Jpa5fLQMWuAu6/KufC5wR3DYp39tGe9AAmXtODBT ubG7YD4e0rHAWRRS/sXmZpBZW6SjgQdvuucnI559+pQe6rOYTzWkhfAasi2JQhXGwJw1 aC65mfd8gRXBfm4RmDyKWP+eA38NjEZg+1UVuzW+AXGvw0cFrF+41ZV5pFedXRNaUfGm TNF3BhMqOf8ClF8fKg9Eq1pnWOcvDMVdCqW1vYkjkN7mNw5dIqO0jq/lOWkdC7IwiViA F6d3/3llmqxrANGF109buFV2Y7KwIfDkqu10BpvoA7l69p6xROR0TFyvIzEVfo9OmTgf NMvw== Received: by 10.68.242.228 with SMTP id wt4mr32356876pbc.89.1344398081327; Tue, 07 Aug 2012 20:54:41 -0700 (PDT) Received: from anush.mtv.corp.google.com (anush.mtv.corp.google.com [172.22.73.28]) by mx.google.com with ESMTPS id hx9sm12461756pbc.68.2012.08.07.20.54.40 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 20:54:40 -0700 (PDT) From: Sean Paul To: jg1.han@samsung.com, linux-fbdev@vger.kernel.org Cc: Sean Paul Subject: [PATCH 07/10] video: exynos_dp: Improve EDID error handling Date: Tue, 7 Aug 2012 20:54:21 -0700 Message-Id: <1344398064-13563-8-git-send-email-seanpaul@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1344398064-13563-1-git-send-email-seanpaul@chromium.org> References: <1344398064-13563-1-git-send-email-seanpaul@chromium.org> X-Gm-Message-State: ALoCoQmc+Z0gX44n45zxDd2gP+6P9ecK27FoXBfLaicUx1ruLQkQ1wuRNCyV+R5xjcQvFRDwIY4S Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org EDID error handling has 2 problems: - It doesn't fail as early as it can - The retry counts for i2c and aux transactions are huge This patch fails if the initial i2c transaction fails, and reduces the aux and i2c retry counts down to 3. Signed-off-by: Sean Paul Reviewed-by: Olof Johansson --- drivers/video/exynos/exynos_dp_core.c | 18 ++++++++++-------- drivers/video/exynos/exynos_dp_reg.c | 9 ++++----- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/video/exynos/exynos_dp_core.c b/drivers/video/exynos/exynos_dp_core.c index 1c998d9..2882362 100644 --- a/drivers/video/exynos/exynos_dp_core.c +++ b/drivers/video/exynos/exynos_dp_core.c @@ -89,9 +89,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp) */ /* Read Extension Flag, Number of 128-byte EDID extension blocks */ - exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR, + retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR, EDID_EXTENSION_FLAG, &extend_block); + if (retval) + return retval; if (extend_block > 0) { dev_dbg(dp->dev, "EDID data includes a single extension!\n"); @@ -177,21 +179,21 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp) { u8 buf[12]; int i; - int retval; + int ret; /* Read DPCD DPCD_ADDR_DPCD_REV~RECEIVE_PORT1_CAP_1 */ - exynos_dp_read_bytes_from_dpcd(dp, - DPCD_ADDR_DPCD_REV, - 12, buf); + ret = exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_DPCD_REV, 12, buf); + if (ret) + return ret; /* Read EDID */ for (i = 0; i < 3; i++) { - retval = exynos_dp_read_edid(dp); - if (retval == 0) + ret = exynos_dp_read_edid(dp); + if (!ret) break; } - return retval; + return ret; } static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp, diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c index d7b1494..389e0f0 100644 --- a/drivers/video/exynos/exynos_dp_reg.c +++ b/drivers/video/exynos/exynos_dp_reg.c @@ -547,7 +547,7 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp, else cur_data_count = count - start_offset; - for (i = 0; i < 10; i++) { + for (i = 0; i < 3; i++) { /* Select DPCD device address */ reg = AUX_ADDR_7_0(reg_addr + start_offset); writel(reg, dp->reg_base + EXYNOS_DP_AUX_ADDR_7_0); @@ -612,7 +612,7 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp, cur_data_count = count - start_offset; /* AUX CH Request Transaction process */ - for (i = 0; i < 10; i++) { + for (i = 0; i < 3; i++) { /* Select DPCD device address */ reg = AUX_ADDR_7_0(reg_addr + start_offset); writel(reg, dp->reg_base + EXYNOS_DP_AUX_ADDR_7_0); @@ -695,7 +695,7 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp, int i; int retval; - for (i = 0; i < 10; i++) { + for (i = 0; i < 3; i++) { /* Clear AUX CH data buffer */ reg = BUF_CLR; writel(reg, dp->reg_base + EXYNOS_DP_BUFFER_DATA_CTL); @@ -703,7 +703,6 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp, /* Select EDID device */ retval = exynos_dp_select_i2c_device(dp, device_addr, reg_addr); if (retval != 0) { - dev_err(dp->dev, "Select EDID device fail!\n"); continue; } @@ -745,7 +744,7 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp, int retval = 0; for (i = 0; i < count; i += 16) { - for (j = 0; j < 100; j++) { + for (j = 0; j < 3; j++) { /* Clear AUX CH data buffer */ reg = BUF_CLR; writel(reg, dp->reg_base + EXYNOS_DP_BUFFER_DATA_CTL);