From patchwork Wed Sep 19 16:04:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Harkin X-Patchwork-Id: 1478361 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 3A325DF280 for ; Wed, 19 Sep 2012 16:10:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756695Ab2ISQKx (ORCPT ); Wed, 19 Sep 2012 12:10:53 -0400 Received: from woodbine.london.02.net ([87.194.255.145]:34091 "EHLO woodbine.london.02.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756686Ab2ISQKt (ORCPT ); Wed, 19 Sep 2012 12:10:49 -0400 X-Greylist: delayed 365 seconds by postgrey-1.27 at vger.kernel.org; Wed, 19 Sep 2012 12:10:49 EDT Received: from vaio (87.194.2.170) by woodbine.london.02.net (8.5.140) id 4FED9DF1024AD447; Wed, 19 Sep 2012 17:04:27 +0100 Received: from ryan by vaio with local (Exim 4.76) (envelope-from ) id 1TEMlH-0002OS-28; Wed, 19 Sep 2012 17:04:27 +0100 From: Ryan Harkin To: ryan.harkin@linaro.org, arnd.bergmann@linaro.org, shiraz.hashim@st.com, stigge@antcom.de, pawel.moll@arm.com, tixy@linaro.org, liviu.dudau@arm.com, spear-devel@list.st.com, viresh.linux@gmail.com, linux-arm-kernel@lists.infradead.org, linux-fbdev@vger.kernel.org, devicetree-discuss@lists.ozlabs.org Subject: [RFC PATCH 2/3] ARM: vexpress: Add device tree support for CLCD driver Date: Wed, 19 Sep 2012 17:04:25 +0100 Message-Id: <1348070666-9153-3-git-send-email-ryan.harkin@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1348070666-9153-1-git-send-email-ryan.harkin@linaro.org> References: <1348070666-9153-1-git-send-email-ryan.harkin@linaro.org> Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Add support for device tree in the amba-clcd PL111 video driver. Special case support is added for the A9 CoreTile which uses the "legacy" address map and has a PL111 device on-board. The default case is to configure the device on the motherboard. Oscillator support is added for the A9 CoreTile's CLCD driver. Signed-off-by: Ryan Harkin --- arch/arm/mach-vexpress/v2m.c | 58 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 37608f2..799e00e 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -3,6 +3,7 @@ */ #include #include +#include #include #include #include @@ -37,6 +38,7 @@ #include #include +#include #include #include "core.h" @@ -541,6 +543,54 @@ MACHINE_END #if defined(CONFIG_ARCH_VEXPRESS_DT) +static struct v2m_osc v2m_dt_clcd_osc = { + .rate_min = 10000000, + .rate_max = 165000000, + .rate_default = 23750000, +}; + +static int v2m_dt_clcd_init(void) +{ + struct device_node *node; + u32 osc; + u32 clcd_site; + u32 dvimode; + const __be32 *prop; + int len, na, ns; + phys_addr_t reg_base; + + node = of_find_compatible_node(NULL, NULL, "arm,pl111"); + if (!node) + return -ENODEV; + + na = of_n_addr_cells(node); + ns = of_n_size_cells(node); + + prop = of_get_property(node, "reg", &len); + if (WARN_ON(!prop || len < (na + ns) * sizeof(*prop))) + return -EINVAL; + reg_base = of_read_number(prop, na); + + switch (reg_base) { + case CT_CA9X4_CLCDC: + clcd_site = v2m_get_master_site(); + dvimode = 2; + break; + default: + clcd_site = SYS_CFG_SITE_MB; + dvimode = 0; + break; + } + + if (of_property_read_u32(node, "arm,vexpress-osc", &osc) != 0) + return -EINVAL; + v2m_dt_clcd_osc.site = clcd_site; + v2m_dt_clcd_osc.osc = osc; + v2m_cfg_write(SYS_CFG_MUXFPGA | clcd_site, clcd_site); + v2m_cfg_write(SYS_CFG_DVIMODE | clcd_site, dvimode); + return 0; +} + static struct map_desc v2m_rs1_io_desc __initdata = { .virtual = V2M_PERIPH, .pfn = __phys_to_pfn(0x1c000000), @@ -598,6 +648,8 @@ void __init v2m_dt_init_early(void) pr_warning("vexpress: DT HBI (%x) is not matching " "hardware (%x)!\n", dt_hbi, hbi); } + + v2m_dt_clcd_init(); } static struct of_device_id vexpress_irq_match[] __initdata = { @@ -631,6 +683,12 @@ static void __init v2m_dt_timer_init(void) if (arch_timer_sched_clock_init() != 0) versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); + + if (v2m_dt_clcd_osc.site) { + /* core tile clcd controller for A9 */ + clk = v2m_osc_register("10020000.clcd", &v2m_dt_clcd_osc); + clk_register_clkdev(clk, NULL, "10020000.clcd"); + } } static struct sys_timer v2m_dt_timer = {