From patchwork Tue Jun 25 14:22:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Etheridge, Darren" X-Patchwork-Id: 2777201 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1BAFDC0AB1 for ; Tue, 25 Jun 2013 14:47:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D6C1F2016A for ; Tue, 25 Jun 2013 14:47:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 088B120172 for ; Tue, 25 Jun 2013 14:46:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751870Ab3FYOqp (ORCPT ); Tue, 25 Jun 2013 10:46:45 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:41725 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751592Ab3FYOqo (ORCPT ); Tue, 25 Jun 2013 10:46:44 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5PEkhfl011916; Tue, 25 Jun 2013 09:46:43 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5PEkhXn003245; Tue, 25 Jun 2013 09:46:43 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Tue, 25 Jun 2013 09:46:43 -0500 Received: from localhost.localdomain (sdit-build03.sc.ti.com [128.247.24.118]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r5PEkH9S019039; Tue, 25 Jun 2013 09:46:43 -0500 From: Darren Etheridge To: , , , CC: Subject: [PATCH 10/23] video: da8xx-fb: fb_set_par support Date: Tue, 25 Jun 2013 09:22:38 -0500 Message-ID: <1372170171-9561-11-git-send-email-detheridge@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1372170171-9561-1-git-send-email-detheridge@ti.com> References: <1372170171-9561-1-git-send-email-detheridge@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Afzal Mohammed fb_set_par helps in runtime configuration of lcd controller like changing resolution, pixel clock etc. (eg. using fbset utility) Reconfigure lcd controller based on information passed by framework. Enable raster back if it was already enabled. As fb_set_par would get invoked indirectly from probe via fb_set_var, remove existing lcdc initialization in probe and do lcdc reset in probe so that reset happens only at the begining. Signed-off-by: Afzal Mohammed Signed-off-by: Darren Etheridge --- drivers/video/da8xx-fb.c | 60 +++++++++++++++++++++++++++++++++++++-------- 1 files changed, 49 insertions(+), 11 deletions(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 0f73c76..720604c 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -243,6 +243,11 @@ static struct fb_videomode known_lcd_panels[] = { }, }; +static inline bool da8xx_fb_is_raster_enabled(void) +{ + return !!(lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE); +} + /* Enable the Raster Engine of the LCD Controller */ static inline void lcd_enable_raster(void) { @@ -665,9 +670,6 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green, static void da8xx_fb_lcd_reset(void) { - /* Disable the Raster if previously Enabled */ - lcd_disable_raster(false); - /* DMA has to be disabled */ lcdc_write(0, LCD_DMA_CTRL_REG); lcdc_write(0, LCD_RASTER_CTRL_REG); @@ -720,8 +722,6 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, u32 bpp; int ret = 0; - da8xx_fb_lcd_reset(); - da8xx_fb_calc_config_clk_divider(par, panel); if (panel->sync & FB_SYNC_CLK_INVERT) @@ -1201,9 +1201,52 @@ static int da8xx_pan_display(struct fb_var_screeninfo *var, return ret; } +static int da8xxfb_set_par(struct fb_info *info) +{ + struct da8xx_fb_par *par = info->par; + int ret; + bool raster = da8xx_fb_is_raster_enabled(); + + if (raster) + lcd_disable_raster(true); + else + lcd_disable_raster(false); + + fb_var_to_videomode(&par->mode, &info->var); + + par->cfg.bpp = info->var.bits_per_pixel; + + info->fix.visual = (par->cfg.bpp <= 8) ? + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; + info->fix.line_length = (par->mode.xres * par->cfg.bpp) / 8; + + ret = lcd_init(par, &par->cfg, &par->mode); + if (ret < 0) { + dev_err(par->dev, "lcd init failed\n"); + return ret; + } + + par->dma_start = info->fix.smem_start + + info->var.yoffset * info->fix.line_length + + info->var.xoffset * info->var.bits_per_pixel / 8; + par->dma_end = par->dma_start + + info->var.yres * info->fix.line_length - 1; + + lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_0_REG); + lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_0_REG); + lcdc_write(par->dma_start, LCD_DMA_FRM_BUF_BASE_ADDR_1_REG); + lcdc_write(par->dma_end, LCD_DMA_FRM_BUF_CEILING_ADDR_1_REG); + + if (raster) + lcd_enable_raster(); + + return 0; +} + static struct fb_ops da8xx_fb_ops = { .owner = THIS_MODULE, .fb_check_var = fb_check_var, + .fb_set_par = da8xxfb_set_par, .fb_setcolreg = fb_setcolreg, .fb_pan_display = da8xx_pan_display, .fb_ioctl = fb_ioctl, @@ -1312,14 +1355,9 @@ static int fb_probe(struct platform_device *device) } fb_videomode_to_var(&da8xx_fb_var, lcdc_info); - fb_var_to_videomode(&par->mode, &da8xx_fb_var); par->cfg = *lcd_cfg; - if (lcd_init(par, lcd_cfg, lcdc_info) < 0) { - dev_err(&device->dev, "lcd_init failed\n"); - ret = -EFAULT; - goto err_release_fb; - } + da8xx_fb_lcd_reset(); /* allocate frame buffer */ par->vram_size = lcdc_info->xres * lcdc_info->yres * lcd_cfg->bpp;