@@ -175,6 +175,12 @@
};
};
+ ipu {
+ pinctrl_ipu_disp0: ipudisp0grp {
+ fsl,pins = <MX35_IPU_PINGRP1>;
+ };
+ };
+
uart1 {
pinctrl_uart1_1: uart1grp-1 {
fsl,pins = <MX35_UART1_PINGRP1>;
@@ -266,6 +272,13 @@
status = "disabled";
};
+ ipu: ipu@53fc0000 {
+ compatible = "fsl,imx35-ipu";
+ reg = <0x53fc0000 0x4000>;
+ clocks = <&clks 55>;
+ status = "disabled";
+ };
+
audmux: audmux@53fc4000 {
compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
reg = <0x53fc4000 0x4000>;
@@ -16,14 +16,21 @@
#include <asm/mach/time.h>
#include <asm/hardware/cache-l2x0.h>
#include "common.h"
+#include "devices-imx35.h"
#include "mx35.h"
static void __init imx35_dt_init(void)
{
+ struct device_node *np;
mxc_arch_reset_init_dt();
of_platform_populate(NULL, of_default_bus_match_table,
NULL, NULL);
+
+ /* We don't want to export the IPU as DT bindings. */
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx35-ipu");
+ if (of_device_is_available(np))
+ imx35_add_ipu_core();
}
static void __init imx35_timer_init(void)
A pinctrl node for the IPU was also added. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: linux-fbdev@vger.kernel.org Cc: Eric BĂ©nard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> --- ChangeLog v4->v5: - Added Grant Likely and Shawn Guo in the Cc list. - Adapted to the new non-dma ipu bindings. - Adapted to the use of imx35-pingrp.h - The pinctrl ipu node addition was moved in this commit. ChangeLog v3->v4: - Splitted the imx35.dtsi display support (new patch). --- arch/arm/boot/dts/imx35.dtsi | 13 +++++++++++++ arch/arm/mach-imx/imx35-dt.c | 7 +++++++ 2 files changed, 20 insertions(+)