From patchwork Thu Feb 26 12:49:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 5891821 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EB2419F269 for ; Thu, 26 Feb 2015 12:49:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C03D20398 for ; Thu, 26 Feb 2015 12:49:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 398852039E for ; Thu, 26 Feb 2015 12:49:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753526AbbBZMto (ORCPT ); Thu, 26 Feb 2015 07:49:44 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:37397 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753303AbbBZMtn (ORCPT ); Thu, 26 Feb 2015 07:49:43 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t1QCngeg026068; Thu, 26 Feb 2015 06:49:42 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t1QCnfpc016696; Thu, 26 Feb 2015 06:49:41 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Thu, 26 Feb 2015 06:49:41 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t1QCnUhP030427; Thu, 26 Feb 2015 06:49:40 -0600 From: Tomi Valkeinen To: , CC: Tomi Valkeinen Subject: [PATCH 08/15] OMAPDSS: DISPC: change sync_pclk_edge default value Date: Thu, 26 Feb 2015 14:49:02 +0200 Message-ID: <1424954949-12801-8-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.3.0 In-Reply-To: <1424954949-12801-1-git-send-email-tomi.valkeinen@ti.com> References: <1424954949-12801-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The common 'struct videomode' does not have a flag to select when the sync signals should be driven. The default behavior of DISPC HW is to drive the sync signal on the opposite pixel clock edge from data signal, which is also what the videomode_to_omap_video_timings() uses. However, it looks like what panels usually expect is that the data and sync signals are driven on the same edge, so let's change videomode_to_omap_video_timings() to set the sync_pclk_edge accordingly. Note that this only affect panels drivers that use videomode_to_omap_video_timings(), probably when getting the video timings directly from DT data. The drivers can still configure the sync_pclk_edge independently if they so wish. Signed-off-by: Tomi Valkeinen --- drivers/video/fbdev/omap2/dss/display.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/video/fbdev/omap2/dss/display.c b/drivers/video/fbdev/omap2/dss/display.c index a6fd2d35ad60..ef5b9027985d 100644 --- a/drivers/video/fbdev/omap2/dss/display.c +++ b/drivers/video/fbdev/omap2/dss/display.c @@ -295,9 +295,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, OMAPDSS_DRIVE_SIG_RISING_EDGE : OMAPDSS_DRIVE_SIG_FALLING_EDGE; - ovt->sync_pclk_edge = vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE ? - OMAPDSS_DRIVE_SIG_FALLING_EDGE : - OMAPDSS_DRIVE_SIG_RISING_EDGE; + ovt->sync_pclk_edge = ovt->data_pclk_edge; } EXPORT_SYMBOL(videomode_to_omap_video_timings);