From patchwork Wed Jan 25 18:52:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 9537773 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7D9546046A for ; Wed, 25 Jan 2017 18:54:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6ECC327D4D for ; Wed, 25 Jan 2017 18:54:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 62BB527E22; Wed, 25 Jan 2017 18:54:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CBECE27D4D for ; Wed, 25 Jan 2017 18:54:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752386AbdAYSyW (ORCPT ); Wed, 25 Jan 2017 13:54:22 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:34788 "EHLO outils.crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752580AbdAYSws (ORCPT ); Wed, 25 Jan 2017 13:52:48 -0500 From: Paul Cercueil To: Linus Walleij , Rob Herring , Mark Rutland , Ralf Baechle , Ulf Hansson Cc: Boris Brezillon , Thierry Reding , Bartlomiej Zolnierkiewicz , Maarten ter Huurne , Lars-Peter Clausen , Paul Burton , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, linux-mmc@vger.kernel.org, linux-mtd@lists.infradead.org, linux-pwm@vger.kernel.org, linux-fbdev@vger.kernel.org, james.hogan@imgtec.com, Paul Cercueil Subject: [PATCH v3 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Date: Wed, 25 Jan 2017 19:52:03 +0100 Message-Id: <20170125185207.23902-11-paul@crapouillou.net> In-Reply-To: <20170125185207.23902-1-paul@crapouillou.net> References: <27071da2f01d48141e8ac3dfaa13255d@mail.crapouillou.net> <20170125185207.23902-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1485370364; bh=KMYMiQ4WPXtY+uM9GdsNrCy8KLIHghg0Pg75Zu8HlRk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=H1LaYWGv7Ab4rTn1Kam8mTXi/Mwq5pO8g8nFPH0ygA0/d16JHQ2X5H2VwggN7XtFCIsBzpmw3axyffIwK/Pt4R3O0l1fsgAOda4i3dBsll4QLqYO6RiBgXoLWOnpJ1NeoUTG2fHENdyRmgGuBNgNQorhBKyhhv+8dgu/L/VHa68= Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on the pins being properly configured before the driver probes. Signed-off-by: Paul Cercueil Acked-by: Ulf Hansson --- drivers/mmc/host/jz4740_mmc.c | 45 +++++-------------------------------------- 1 file changed, 5 insertions(+), 40 deletions(-) v2: Set pin sleep/default state in suspend/resume callbacks v3: No changes diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c index 819ad32964fc..b5fec5b7ee7b 100644 --- a/drivers/mmc/host/jz4740_mmc.c +++ b/drivers/mmc/host/jz4740_mmc.c @@ -20,14 +20,13 @@ #include #include #include +#include #include #include #include #include #include -#include -#include #include #include #include @@ -906,15 +905,6 @@ static const struct mmc_host_ops jz4740_mmc_ops = { .enable_sdio_irq = jz4740_mmc_enable_sdio_irq, }; -static const struct jz_gpio_bulk_request jz4740_mmc_pins[] = { - JZ_GPIO_BULK_PIN(MSC_CMD), - JZ_GPIO_BULK_PIN(MSC_CLK), - JZ_GPIO_BULK_PIN(MSC_DATA0), - JZ_GPIO_BULK_PIN(MSC_DATA1), - JZ_GPIO_BULK_PIN(MSC_DATA2), - JZ_GPIO_BULK_PIN(MSC_DATA3), -}; - static int jz4740_mmc_request_gpio(struct device *dev, int gpio, const char *name, bool output, int value) { @@ -978,15 +968,6 @@ static void jz4740_mmc_free_gpios(struct platform_device *pdev) gpio_free(pdata->gpio_power); } -static inline size_t jz4740_mmc_num_pins(struct jz4740_mmc_host *host) -{ - size_t num_pins = ARRAY_SIZE(jz4740_mmc_pins); - if (host->pdata && host->pdata->data_1bit) - num_pins -= 3; - - return num_pins; -} - static int jz4740_mmc_probe(struct platform_device* pdev) { int ret; @@ -1027,15 +1008,9 @@ static int jz4740_mmc_probe(struct platform_device* pdev) goto err_free_host; } - ret = jz_gpio_bulk_request(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); - if (ret) { - dev_err(&pdev->dev, "Failed to request mmc pins: %d\n", ret); - goto err_free_host; - } - ret = jz4740_mmc_request_gpios(mmc, pdev); if (ret) - goto err_gpio_bulk_free; + goto err_release_dma; mmc->ops = &jz4740_mmc_ops; mmc->f_min = JZ_MMC_CLK_RATE / 128; @@ -1091,10 +1066,9 @@ static int jz4740_mmc_probe(struct platform_device* pdev) free_irq(host->irq, host); err_free_gpios: jz4740_mmc_free_gpios(pdev); -err_gpio_bulk_free: +err_release_dma: if (host->use_dma) jz4740_mmc_release_dma_channels(host); - jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); err_free_host: mmc_free_host(mmc); @@ -1114,7 +1088,6 @@ static int jz4740_mmc_remove(struct platform_device *pdev) free_irq(host->irq, host); jz4740_mmc_free_gpios(pdev); - jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); if (host->use_dma) jz4740_mmc_release_dma_channels(host); @@ -1128,20 +1101,12 @@ static int jz4740_mmc_remove(struct platform_device *pdev) static int jz4740_mmc_suspend(struct device *dev) { - struct jz4740_mmc_host *host = dev_get_drvdata(dev); - - jz_gpio_bulk_suspend(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); - - return 0; + return pinctrl_pm_select_sleep_state(dev); } static int jz4740_mmc_resume(struct device *dev) { - struct jz4740_mmc_host *host = dev_get_drvdata(dev); - - jz_gpio_bulk_resume(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); - - return 0; + return pinctrl_pm_select_default_state(dev); } static SIMPLE_DEV_PM_OPS(jz4740_mmc_pm_ops, jz4740_mmc_suspend,