From patchwork Fri Mar 10 21:56:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arushi X-Patchwork-Id: 9618055 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1A11060415 for ; Fri, 10 Mar 2017 21:57:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0353D28784 for ; Fri, 10 Mar 2017 21:57:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBD80287A8; Fri, 10 Mar 2017 21:57:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8551828784 for ; Fri, 10 Mar 2017 21:57:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934314AbdCJV5l (ORCPT ); Fri, 10 Mar 2017 16:57:41 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:33575 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934268AbdCJV5d (ORCPT ); Fri, 10 Mar 2017 16:57:33 -0500 Received: by mail-pg0-f68.google.com with SMTP id 77so11533302pgc.0; Fri, 10 Mar 2017 13:57:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RUek8EdKs5Iyt24DUoRB4SQiNrskwcFxQ1jFwryD6aI=; b=XITaOK4PvRP/nAAdeajBVOhzOHm19Sz8cAcV758466dD+hdVsaxIRD5YKCiAuFXMqw LR6Gbw577J4o9URp/d+i96jhVCiMZwygtwC8aPEWk7/DsFavvOI4bAde53Tnp7dQUf6m JYN+UuNdaGXWYxupWObTkt1uI4IyK3mllTbYha99eQ7DuqnVQsQDqyTWvjkXW8l+EKog 68FiWltedZYajzGBKgR1/qUeJABG4fzYTsC9ts3v6arK/Zqi24uSAyCnZiFvpPns7Lpd ioPFsXyIfU6cdpXEH3wDFZJW/EaZnorrmPdM4Hi4il6ojla2h3l+/VKEYMkTqLjIonAc o5rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RUek8EdKs5Iyt24DUoRB4SQiNrskwcFxQ1jFwryD6aI=; b=mIMBbBBI9nX/UQlFY2gKxi0lSr29xQ8QBbHNcm/9zGne62Rhri+voxYOY49Ix9koIp 9PMo+k5HU3LDL7g5Tcs61IaW7NbsYydJNa0fcr8eJigaTDROqEI3qGp1Ao6M2Cm/Gv9g Rk7NuFMjip27+ScMT2jTrKEflfk/iD0FIeoqDYoOUkgRI5us3fuwAVqkQjSBQTeNSTKo sfPB70msN/3FvZCbDg6O7ln8IoxSJ5QrPzHj2L2v9wTmMLeXwjsYPb9vRiiCZVA9BuUp 5PlrTU19aGqcljEm45zv17eam8Poxu0kVaYuk1yqrdPIUyxM597jWeGC5MpdaeCziL2i VTfA== X-Gm-Message-State: AMke39mwWv2RsN3UX/kycLl5pN7Uvujhdt4b3adqmU55Zr6p/utUPkdzeUDf3aRSmcGa9Q== X-Received: by 10.84.174.4 with SMTP id q4mr28481624plb.35.1489183041509; Fri, 10 Mar 2017 13:57:21 -0800 (PST) Received: from arushi-HP-Pavilion-Notebook ([14.139.82.6]) by smtp.gmail.com with ESMTPSA id r13sm20412800pfg.55.2017.03.10.13.57.19 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 10 Mar 2017 13:57:20 -0800 (PST) From: Arushi Singhal To: outreachy-kernel@googlegroups.com Cc: sudipm.mukherjee@gmail.com, teddy.wang@siliconmotion.com, gregkh@linuxfoundation.org, linux-fbdev@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Arushi Singhal Subject: [PATCH 3/3] staging: sm750fb: Alignment should match open parenthesis Date: Sat, 11 Mar 2017 03:26:57 +0530 Message-Id: <20170310215657.7069-4-arushisinghal19971997@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170310215657.7069-1-arushisinghal19971997@gmail.com> References: <20170310215657.7069-1-arushisinghal19971997@gmail.com> Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix checkpatch issues: "CHECK: Alignment should match open parenthesis". Signed-off-by: Arushi Singhal --- drivers/staging/sm750fb/ddk750_mode.c | 79 +++++++++++++++++------------------ 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index 45af806c8d55..eea5aef2956f 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -28,9 +28,9 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, poke32(CRT_AUTO_CENTERING_TL, 0); poke32(CRT_AUTO_CENTERING_BR, - (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) & - CRT_AUTO_CENTERING_BR_BOTTOM_MASK) | - ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); + (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) & + CRT_AUTO_CENTERING_BR_BOTTOM_MASK) | + ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); /* * Assume common fields in dispControl have been properly set before @@ -72,8 +72,7 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, } /* only timing related registers will be programed */ -static int programModeRegisters(mode_parameter_t *pModeParam, - struct pll_value *pll) +static int programModeRegisters(mode_parameter_t *pModeParam, struct pll_value *pll) { int ret = 0; int cnt = 0; @@ -83,32 +82,32 @@ static int programModeRegisters(mode_parameter_t *pModeParam, /* programe secondary pixel clock */ poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll)); poke32(CRT_HORIZONTAL_TOTAL, - (((pModeParam->horizontal_total - 1) << - CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) & - CRT_HORIZONTAL_TOTAL_TOTAL_MASK) | - ((pModeParam->horizontal_display_end - 1) & - CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->horizontal_total - 1) << + CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) & + CRT_HORIZONTAL_TOTAL_TOTAL_MASK) | + ((pModeParam->horizontal_display_end - 1) & + CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK)); poke32(CRT_HORIZONTAL_SYNC, - ((pModeParam->horizontal_sync_width << - CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) & - CRT_HORIZONTAL_SYNC_WIDTH_MASK) | - ((pModeParam->horizontal_sync_start - 1) & - CRT_HORIZONTAL_SYNC_START_MASK)); + ((pModeParam->horizontal_sync_width << + CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) & + CRT_HORIZONTAL_SYNC_WIDTH_MASK) | + ((pModeParam->horizontal_sync_start - 1) & + CRT_HORIZONTAL_SYNC_START_MASK)); poke32(CRT_VERTICAL_TOTAL, - (((pModeParam->vertical_total - 1) << - CRT_VERTICAL_TOTAL_TOTAL_SHIFT) & - CRT_VERTICAL_TOTAL_TOTAL_MASK) | - ((pModeParam->vertical_display_end - 1) & - CRT_VERTICAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->vertical_total - 1) << + CRT_VERTICAL_TOTAL_TOTAL_SHIFT) & + CRT_VERTICAL_TOTAL_TOTAL_MASK) | + ((pModeParam->vertical_display_end - 1) & + CRT_VERTICAL_TOTAL_DISPLAY_END_MASK)); poke32(CRT_VERTICAL_SYNC, - ((pModeParam->vertical_sync_height << - CRT_VERTICAL_SYNC_HEIGHT_SHIFT) & - CRT_VERTICAL_SYNC_HEIGHT_MASK) | - ((pModeParam->vertical_sync_start - 1) & - CRT_VERTICAL_SYNC_START_MASK)); + ((pModeParam->vertical_sync_height << + CRT_VERTICAL_SYNC_HEIGHT_SHIFT) & + CRT_VERTICAL_SYNC_HEIGHT_MASK) | + ((pModeParam->vertical_sync_start - 1) & + CRT_VERTICAL_SYNC_START_MASK)); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; if (pModeParam->vertical_sync_polarity) @@ -140,25 +139,25 @@ static int programModeRegisters(mode_parameter_t *pModeParam, poke32(PANEL_HORIZONTAL_TOTAL, reg); poke32(PANEL_HORIZONTAL_SYNC, - ((pModeParam->horizontal_sync_width << - PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) & - PANEL_HORIZONTAL_SYNC_WIDTH_MASK) | - ((pModeParam->horizontal_sync_start - 1) & - PANEL_HORIZONTAL_SYNC_START_MASK)); + ((pModeParam->horizontal_sync_width << + PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) & + PANEL_HORIZONTAL_SYNC_WIDTH_MASK) | + ((pModeParam->horizontal_sync_start - 1) & + PANEL_HORIZONTAL_SYNC_START_MASK)); poke32(PANEL_VERTICAL_TOTAL, - (((pModeParam->vertical_total - 1) << - PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) & - PANEL_VERTICAL_TOTAL_TOTAL_MASK) | - ((pModeParam->vertical_display_end - 1) & - PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->vertical_total - 1) << + PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) & + PANEL_VERTICAL_TOTAL_TOTAL_MASK) | + ((pModeParam->vertical_display_end - 1) & + PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK)); poke32(PANEL_VERTICAL_SYNC, - ((pModeParam->vertical_sync_height << - PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) & - PANEL_VERTICAL_SYNC_HEIGHT_MASK) | - ((pModeParam->vertical_sync_start - 1) & - PANEL_VERTICAL_SYNC_START_MASK)); + ((pModeParam->vertical_sync_height << + PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) & + PANEL_VERTICAL_SYNC_HEIGHT_MASK) | + ((pModeParam->vertical_sync_start - 1) & + PANEL_VERTICAL_SYNC_START_MASK)); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; if (pModeParam->vertical_sync_polarity)