| Message ID | 20170630112109.13785-3-enric.balletbo@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi index d752a31..c0e8ce2 100644 --- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi @@ -96,7 +96,7 @@ pinctrl-names = "default"; pinctrl-0 = <&bl_en>; pwms = <&pwm0 0 1000000 0>; - pwm-delay-us = <10000>; + pwm-delay-us = <10000 10000>; }; gpio-charger {
For veyron the binding should provide both pwm timings, the delay between you enable the PWM and set the enable signal, and the delay between you disable the PWM signal and clear the enable signal. Update the binding accordingly, in this case the panels connected to the veyron boards have a symetric power sequence, hence the same value is used. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> --- Changes since v1: - Add this new patch to fix current binding on veyron. arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)