From patchwork Sun Feb 9 03:53:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwan-gyeong Mun X-Patchwork-Id: 11371969 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52A75109A for ; Sun, 9 Feb 2020 03:54:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3B7EA20714 for ; Sun, 9 Feb 2020 03:54:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727559AbgBIDyK (ORCPT ); Sat, 8 Feb 2020 22:54:10 -0500 Received: from mga04.intel.com ([192.55.52.120]:63111 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727550AbgBIDyK (ORCPT ); Sat, 8 Feb 2020 22:54:10 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Feb 2020 19:54:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,419,1574150400"; d="scan'208";a="221210575" Received: from rrcarnag-mobl.amr.corp.intel.com (HELO helsinki.ger.corp.intel.com) ([10.252.14.133]) by orsmga007.jf.intel.com with ESMTP; 08 Feb 2020 19:54:09 -0800 From: Gwan-gyeong Mun To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org Subject: [PATCH v5 15/18] drm/i915: Program DP SDPs on pipe updates Date: Sun, 9 Feb 2020 05:53:42 +0200 Message-Id: <20200209035345.357436-16-gwan-gyeong.mun@intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200209035345.357436-1-gwan-gyeong.mun@intel.com> References: <20200209035345.357436-1-gwan-gyeong.mun@intel.com> MIME-Version: 1.0 Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org Call intel_dp_set_infoframes() function on pipe updates to make sure that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable) on fastsets. Signed-off-by: Gwan-gyeong Mun Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 195e66744c1e..fce6e36feae1 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4093,6 +4093,7 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder, intel_ddi_set_dp_msa(crtc_state, conn_state); intel_psr_update(intel_dp, crtc_state); + intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); intel_edp_drrs_enable(intel_dp, crtc_state); intel_panel_update_backlight(encoder, crtc_state, conn_state);