From patchwork Thu Sep 1 04:41:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12961752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50A68ECAAD8 for ; Thu, 1 Sep 2022 04:42:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232045AbiIAEmD (ORCPT ); Thu, 1 Sep 2022 00:42:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231668AbiIAEmB (ORCPT ); Thu, 1 Sep 2022 00:42:01 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8437E1AA5; Wed, 31 Aug 2022 21:41:59 -0700 (PDT) X-UUID: 704eaf6425204c1c86c58049272884bc-20220901 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+nDV+vR78OpdEySqlDcu971kberj+QzgCFZD7N3rv4g=; b=NF5R1gJGv2NMM5K1cuzm4lStOWZoHB5j5IJCv9GOo7Td7OgdRYWzIQRG7YZNwkBd956rfcHCu66jL8VMTo3qafTm/spL+gn57t9Ft+Bn40wpolJ2snGlLUCxdWIvm97X2BIeg7v47uDSSEAGsHlh8/nPrSloM1WVb3J3ziiGGwY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.10,REQID:ab5f5452-a611-4534-a8c7-68ba3acf6908,OB:0,L OB:0,IP:0,URL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Releas e_Ham,ACTION:release,TS:-25 X-CID-META: VersionHash:84eae18,CLOUDID:09013c56-e800-47dc-8adf-0c936acf4f1b,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 704eaf6425204c1c86c58049272884bc-20220901 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 995666135; Thu, 01 Sep 2022 12:41:54 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 1 Sep 2022 12:41:52 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 1 Sep 2022 12:41:52 +0800 From: Bo-Chen Chen To: , , , , , , , , , CC: , , , , , , , , , , , , , , Bo-Chen Chen Subject: [PATCH v17 04/10] drm/mediatek: dp: Add multiple bridge types support Date: Thu, 1 Sep 2022 12:41:43 +0800 Message-ID: <20220901044149.16782-5-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220901044149.16782-1-rex-bc.chen@mediatek.com> References: <20220901044149.16782-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org The bridge types of eDP and DP are different. We add device data to this driver and add bridge_type to the device data to define them. Signed-off-by: Bo-Chen Chen Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dp.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index e2ec9b02b1aa..2696c1ac1a47 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -101,6 +101,7 @@ struct mtk_dp { struct drm_device *drm_dev; struct drm_dp_aux aux; + const struct mtk_dp_data *data; struct mtk_dp_info info; struct mtk_dp_train_info train_info; @@ -109,6 +110,9 @@ struct mtk_dp { struct regmap *regs; }; +struct mtk_dp_data { + int bridge_type; +}; static const struct mtk_dp_efuse_fmt mtk_dp_efuse_data[MTK_DP_CAL_MAX] = { [MTK_DP_CAL_GLB_BIAS_TRIM] = { .idx = 3, @@ -1871,6 +1875,7 @@ static int mtk_dp_probe(struct platform_device *pdev) return -ENOMEM; mtk_dp->dev = dev; + mtk_dp->data = (struct mtk_dp_data *)of_device_get_match_data(dev); irq_num = platform_get_irq(pdev, 0); if (irq_num < 0) @@ -1925,7 +1930,7 @@ static int mtk_dp_probe(struct platform_device *pdev) mtk_dp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; - mtk_dp->bridge.type = DRM_MODE_CONNECTOR_eDP; + mtk_dp->bridge.type = mtk_dp->data->bridge_type; drm_bridge_add(&mtk_dp->bridge); @@ -1974,8 +1979,15 @@ static int mtk_dp_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume); +static const struct mtk_dp_data mt8195_edp_data = { + .bridge_type = DRM_MODE_CONNECTOR_eDP, +}; + static const struct of_device_id mtk_dp_of_match[] = { - { .compatible = "mediatek,mt8195-edp-tx" }, + { + .compatible = "mediatek,mt8195-edp-tx", + .data = &mt8195_edp_data, + }, {}, }; MODULE_DEVICE_TABLE(of, mtk_dp_of_match);