From patchwork Mon Aug 10 13:42:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11707425 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 58784174A for ; Mon, 10 Aug 2020 13:41:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 45B8D2076B for ; Mon, 10 Aug 2020 13:41:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726571AbgHJNlo (ORCPT ); Mon, 10 Aug 2020 09:41:44 -0400 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:36202 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726569AbgHJNlo (ORCPT ); Mon, 10 Aug 2020 09:41:44 -0400 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 07ADbw2c012770; Mon, 10 Aug 2020 09:41:41 -0400 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 32sry46rgf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Aug 2020 09:41:41 -0400 Received: from ASHBMBX8.ad.analog.com (ashbmbx8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 07ADfenD061467 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Mon, 10 Aug 2020 09:41:40 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Mon, 10 Aug 2020 09:41:39 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Mon, 10 Aug 2020 09:41:39 -0400 Received: from zeus.spd.analog.com (10.64.82.11) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Mon, 10 Aug 2020 09:41:39 -0400 Received: from localhost.localdomain ([10.48.65.12]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 07ADfY3c030109; Mon, 10 Aug 2020 09:41:35 -0400 From: Alexandru Ardelean To: , , CC: , , , , Alexandru Ardelean Subject: [PATCH v2 0/6] clk: axi-clk-gen: misc updates to the driver Date: Mon, 10 Aug 2020 16:42:39 +0300 Message-ID: <20200810134252.68614-1-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-08-10_09:2020-08-06,2020-08-10 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=920 mlxscore=0 lowpriorityscore=0 clxscore=1011 priorityscore=1501 adultscore=0 phishscore=0 suspectscore=0 impostorscore=0 malwarescore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008100101 Sender: linux-fpga-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org These patches synchronize the driver with the current state in the Analog Devices Linux tree: https://github.com/analogdevicesinc/linux/ They have been in the tree for about 2-3, so they did receive some testing. Highlights are: * Add support for fractional dividers (Lars-Peter Clausen) * Enable support for ZynqMP (UltraScale) (Dragos Bogdan) * Support frequency limits for ZynqMP (Mathias Tausen) - And continued by Mircea Caprioru, to read them from the IP cores Changelog v1 -> v2: - in patch 'include: fpga: adi-axi-common.h: add definitions for supported FPGAs' * converted enums to #define * added Intel FPGA definitions * added Device-Package definitions * added INTEL / XILINX in the define names definitions according to: https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_intel_device_info_enc.tcl https://github.com/analogdevicesinc/hdl/blob/4e438261aa319b1dda4c593c155218a93b1d869b/library/scripts/adi_xilinx_device_info_enc.tcl Dragos Bogdan (1): clk: axi-clkgen: add support for ZynqMP (UltraScale) Lars-Peter Clausen (2): clk: axi-clkgen: Add support for fractional dividers clk: axi-clkgen: Set power bits for fractional mode Mathias Tausen (1): clk: axi-clkgen: Respect ZYNQMP PFD/VCO frequency limits Mircea Caprioru (2): include: fpga: adi-axi-common.h: add definitions for supported FPGAs clk: axi-clkgen: Add support for FPGA info drivers/clk/Kconfig | 2 +- drivers/clk/clk-axi-clkgen.c | 253 ++++++++++++++++++++++------ include/linux/fpga/adi-axi-common.h | 103 +++++++++++ 3 files changed, 302 insertions(+), 56 deletions(-) Acked-by: Moritz Fischer